Gecko [ www.jobworksschool.com ]

Name	Size	Permission	Date
amba	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
atomic	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
avf	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
bcma	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
byteorder	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
can	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
cdx	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
ceph	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
clk	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
comedi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
crush	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
decompress	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
device	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
dma	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
dsa	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
extcon	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
firmware	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
fpga	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
framer	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
fsl	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
gpio	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
greybus	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
habanalabs	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
hsi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
i3c	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
iio	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
input	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
io_uring	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
irqchip	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
isdn	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
lockd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
lsm	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mailbox	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mdio	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mfd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mlx4	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mlx5	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mmc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mtd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mux	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
net	[ DIR ]	drwxr-xr-x	2026-07-17 06:28
netfilter	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_arp	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_bridge	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_ipv4	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_ipv6	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pcs	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pds	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
perf	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
phy	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pinctrl	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
platform_data	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
power	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pse-pd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
qed	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
raid	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
regulator	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
remoteproc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
reset	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
rpmsg	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
rtc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
sched	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
soc	[ DIR ]	drwxr-xr-x	2026-07-17 06:28
soundwire	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
spi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
ssb	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
sunrpc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
surface_aggregator	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
ulpi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
unaligned	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
usb	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
8250_pci.h	1.01 KB	-rw-r--r--	2024-03-10 20:38
acct.h	2.45 KB	-rw-r--r--	2024-03-10 20:38
acpi.h	44.11 KB	-rw-r--r--	2026-07-01 19:48
acpi_amd_wbrf.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
acpi_dma.h	3.08 KB	-rw-r--r--	2024-03-10 20:38
acpi_iort.h	2.64 KB	-rw-r--r--	2024-03-10 20:38
acpi_mdio.h	819 B	-rw-r--r--	2024-03-10 20:38
acpi_pmtmr.h	674 B	-rw-r--r--	2024-03-10 20:38
acpi_viot.h	478 B	-rw-r--r--	2024-03-10 20:38
adb.h	1.79 KB	-rw-r--r--	2024-03-10 20:38
adfs_fs.h	574 B	-rw-r--r--	2024-03-10 20:38
adreno-smmu-priv.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
adxl.h	310 B	-rw-r--r--	2024-03-10 20:38
aer.h	1.29 KB	-rw-r--r--	2024-03-10 20:38
agp_backend.h	3.45 KB	-rw-r--r--	2024-03-10 20:38
agpgart.h	3.79 KB	-rw-r--r--	2024-03-10 20:38
ahci-remap.h	607 B	-rw-r--r--	2024-03-10 20:38
ahci_platform.h	1.81 KB	-rw-r--r--	2024-03-10 20:38
aio.h	570 B	-rw-r--r--	2024-03-10 20:38
alarmtimer.h	1.94 KB	-rw-r--r--	2024-03-10 20:38
alcor_pci.h	8.7 KB	-rw-r--r--	2024-03-10 20:38
align.h	552 B	-rw-r--r--	2024-03-10 20:38
altera_jtaguart.h	379 B	-rw-r--r--	2024-03-10 20:38
altera_uart.h	397 B	-rw-r--r--	2024-03-10 20:38
amd-iommu.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
amd-pmf-io.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
anon_inodes.h	855 B	-rw-r--r--	2024-03-10 20:38
aperture.h	1.61 KB	-rw-r--r--	2024-03-10 20:38
apm-emulation.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
apm_bios.h	2.25 KB	-rw-r--r--	2024-03-10 20:38
apple-gmux.h	4.63 KB	-rw-r--r--	2024-03-10 20:38
arch_topology.h	3 KB	-rw-r--r--	2024-03-10 20:38
args.h	994 B	-rw-r--r--	2024-03-10 20:38
arm-cci.h	1.39 KB	-rw-r--r--	2024-03-10 20:38
arm-smccc.h	17.18 KB	-rw-r--r--	2026-07-01 19:48
arm_ffa.h	13.25 KB	-rw-r--r--	2024-03-10 20:38
arm_sdei.h	2.67 KB	-rw-r--r--	2026-07-01 19:48
armada-37xx-rwtm-mailbox.h	431 B	-rw-r--r--	2024-03-10 20:38
array_size.h	332 B	-rw-r--r--	2024-03-10 20:38
ascii85.h	555 B	-rw-r--r--	2024-03-10 20:38
asn1.h	1.79 KB	-rw-r--r--	2024-03-10 20:38
asn1_ber_bytecode.h	2.52 KB	-rw-r--r--	2024-03-10 20:38
asn1_decoder.h	468 B	-rw-r--r--	2024-03-10 20:38
asn1_encoder.h	1006 B	-rw-r--r--	2024-03-10 20:38
assoc_array.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
assoc_array_priv.h	5.3 KB	-rw-r--r--	2024-03-10 20:38
async.h	4.33 KB	-rw-r--r--	2024-03-10 20:38
async_tx.h	6.7 KB	-rw-r--r--	2024-03-10 20:38
ata.h	30.45 KB	-rw-r--r--	2026-07-01 19:48
ata_platform.h	755 B	-rw-r--r--	2024-03-10 20:38
atalk.h	4.45 KB	-rw-r--r--	2024-03-10 20:38
ath9k_platform.h	1.44 KB	-rw-r--r--	2024-03-10 20:38
atm.h	287 B	-rw-r--r--	2024-03-10 20:38
atm_tcp.h	542 B	-rw-r--r--	2024-03-10 20:38
atmdev.h	10.23 KB	-rw-r--r--	2026-07-01 19:48
atmel-isc-media.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
atmel-ssc.h	9.74 KB	-rw-r--r--	2024-03-10 20:38
atmel_pdc.h	1.26 KB	-rw-r--r--	2024-03-10 20:38
atomic.h	2.58 KB	-rw-r--r--	2024-03-10 20:38
attribute_container.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
audit.h	20.24 KB	-rw-r--r--	2026-07-01 19:48
audit_arch.h	784 B	-rw-r--r--	2026-07-01 19:48
auto_dev-ioctl.h	296 B	-rw-r--r--	2024-03-10 20:38
auto_fs.h	278 B	-rw-r--r--	2024-03-10 20:38
auxiliary_bus.h	9.67 KB	-rw-r--r--	2024-03-10 20:38
auxvec.h	304 B	-rw-r--r--	2024-03-10 20:38
average.h	2.42 KB	-rw-r--r--	2024-03-10 20:38
backing-dev-defs.h	8.4 KB	-rw-r--r--	2024-03-10 20:38
backing-dev.h	10.46 KB	-rw-r--r--	2026-07-01 19:48
backing-file.h	1.34 KB	-rw-r--r--	2024-03-10 20:38
backlight.h	13.13 KB	-rw-r--r--	2024-03-10 20:38
badblocks.h	2.63 KB	-rw-r--r--	2024-03-10 20:38
balloon_compaction.h	5.69 KB	-rw-r--r--	2026-07-01 19:48
base64.h	370 B	-rw-r--r--	2024-03-10 20:38
bcd.h	683 B	-rw-r--r--	2024-03-10 20:38
bch.h	2.1 KB	-rw-r--r--	2024-03-10 20:38
bcm47xx_nvram.h	1.2 KB	-rw-r--r--	2024-03-10 20:38
bcm47xx_sprom.h	616 B	-rw-r--r--	2024-03-10 20:38
bcm47xx_wdt.h	555 B	-rw-r--r--	2024-03-10 20:38
bcm963xx_nvram.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
bcm963xx_tag.h	3.6 KB	-rw-r--r--	2024-03-10 20:38
binfmts.h	4.51 KB	-rw-r--r--	2026-07-01 19:48
bio.h	21.19 KB	-rw-r--r--	2026-07-01 19:48
bit_spinlock.h	2.3 KB	-rw-r--r--	2024-03-10 20:38
bitfield.h	6.37 KB	-rw-r--r--	2024-03-10 20:38
bitmap-str.h	842 B	-rw-r--r--	2024-03-10 20:38
bitmap.h	26.05 KB	-rw-r--r--	2026-07-01 19:48
bitops.h	9.59 KB	-rw-r--r--	2026-07-01 19:48
bitrev.h	2.53 KB	-rw-r--r--	2024-03-10 20:38
bits.h	2.48 KB	-rw-r--r--	2026-07-01 19:48
blk-cgroup.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
blk-crypto-profile.h	5.3 KB	-rw-r--r--	2024-03-10 20:38
blk-crypto.h	4.13 KB	-rw-r--r--	2024-03-10 20:38
blk-integrity.h	4.68 KB	-rw-r--r--	2026-07-01 19:48
blk-mq-pci.h	271 B	-rw-r--r--	2024-03-10 20:38
blk-mq-virtio.h	294 B	-rw-r--r--	2024-03-10 20:38
blk-mq.h	35.19 KB	-rw-r--r--	2026-07-01 19:48
blk-pm.h	647 B	-rw-r--r--	2024-03-10 20:38
blk_types.h	16.5 KB	-rw-r--r--	2026-07-01 19:48
blkdev.h	45.69 KB	-rw-r--r--	2026-07-01 19:48
blkpg.h	436 B	-rw-r--r--	2024-03-10 20:38
blktrace_api.h	3.55 KB	-rw-r--r--	2024-03-10 20:38
blockgroup_lock.h	810 B	-rw-r--r--	2024-03-10 20:38
bma150.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
bootconfig.h	9.27 KB	-rw-r--r--	2026-07-01 19:48
bootmem_info.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
bottom_half.h	1013 B	-rw-r--r--	2024-03-10 20:38
bpf-cgroup-defs.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
bpf-cgroup.h	18.2 KB	-rw-r--r--	2026-07-01 19:48
bpf-netns.h	1.41 KB	-rw-r--r--	2024-03-10 20:38
bpf.h	103.56 KB	-rw-r--r--	2026-07-01 19:48
bpf_lirc.h	698 B	-rw-r--r--	2024-03-10 20:38
bpf_local_storage.h	5.61 KB	-rw-r--r--	2024-03-10 20:38
bpf_lsm.h	2.01 KB	-rw-r--r--	2026-07-01 19:48
bpf_mem_alloc.h	2.05 KB	-rw-r--r--	2026-07-01 19:48
bpf_mprog.h	9.29 KB	-rw-r--r--	2024-03-10 20:38
bpf_trace.h	166 B	-rw-r--r--	2024-03-10 20:38
bpf_types.h	6.01 KB	-rw-r--r--	2024-03-10 20:38
bpf_verifier.h	31.84 KB	-rw-r--r--	2026-07-01 19:48
bpfptr.h	2 KB	-rw-r--r--	2024-03-10 20:38
brcmphy.h	16.93 KB	-rw-r--r--	2024-03-10 20:38
bsearch.h	624 B	-rw-r--r--	2024-03-10 20:38
bsg-lib.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
bsg.h	499 B	-rw-r--r--	2024-03-10 20:38
btf.h	17.37 KB	-rw-r--r--	2026-07-01 19:48
btf_ids.h	7.67 KB	-rw-r--r--	2024-03-10 20:38
btree-128.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
btree-type.h	3.9 KB	-rw-r--r--	2024-03-10 20:38
btree.h	6.84 KB	-rw-r--r--	2024-03-10 20:38
btrfs.h	145 B	-rw-r--r--	2024-03-10 20:38
buffer_head.h	16.34 KB	-rw-r--r--	2026-07-01 19:48
bug.h	2.17 KB	-rw-r--r--	2024-03-10 20:38
build-salt.h	375 B	-rw-r--r--	2024-03-10 20:38
build_bug.h	2.99 KB	-rw-r--r--	2024-03-10 20:38
buildid.h	581 B	-rw-r--r--	2024-03-10 20:38
bvec.h	7.31 KB	-rw-r--r--	2026-07-01 19:48
c2port.h	1.35 KB	-rw-r--r--	2024-03-10 20:38
cache.h	5.51 KB	-rw-r--r--	2026-07-01 19:48
cacheflush.h	675 B	-rw-r--r--	2024-03-10 20:38
cacheinfo.h	4.27 KB	-rw-r--r--	2024-03-10 20:38
call_once.h	1.67 KB	-rw-r--r--	2026-07-01 19:48
capability.h	6.45 KB	-rw-r--r--	2026-07-01 19:48
cb710.h	5.36 KB	-rw-r--r--	2024-03-10 20:38
cc_platform.h	3.07 KB	-rw-r--r--	2024-03-10 20:38
cciss_ioctl.h	1.03 KB	-rw-r--r--	2024-03-10 20:38
ccp.h	18.14 KB	-rw-r--r--	2024-03-10 20:38
cdev.h	845 B	-rw-r--r--	2024-03-10 20:38
cdrom.h	8.99 KB	-rw-r--r--	2026-07-01 19:48
cfag12864b.h	1.47 KB	-rw-r--r--	2024-03-10 20:38
cfi.h	1.23 KB	-rw-r--r--	2024-03-10 20:38
cfi_types.h	1.06 KB	-rw-r--r--	2024-03-10 20:38
cgroup-defs.h	26.29 KB	-rw-r--r--	2026-07-01 19:48
cgroup.h	26.3 KB	-rw-r--r--	2026-07-01 19:48
cgroup_api.h	26 B	-rw-r--r--	2024-03-10 20:38
cgroup_rdma.h	1.18 KB	-rw-r--r--	2024-03-10 20:38
cgroup_refcnt.h	2.59 KB	-rw-r--r--	2024-03-10 20:38
cgroup_subsys.h	1.23 KB	-rw-r--r--	2024-03-10 20:38
circ_buf.h	1.09 KB	-rw-r--r--	2024-03-10 20:38
cleanup.h	9.41 KB	-rw-r--r--	2026-07-01 19:48
clk-provider.h	62.98 KB	-rw-r--r--	2024-03-10 20:38
clk.h	34.21 KB	-rw-r--r--	2026-07-01 19:48
clkdev.h	1.2 KB	-rw-r--r--	2024-03-10 20:38
clockchips.h	7.29 KB	-rw-r--r--	2024-03-10 20:38
clocksource.h	9.99 KB	-rw-r--r--	2026-07-01 19:48
clocksource_ids.h	247 B	-rw-r--r--	2024-03-10 20:38
closure.h	12.33 KB	-rw-r--r--	2024-03-10 20:38
cma.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
cn_proc.h	1.85 KB	-rw-r--r--	2024-03-10 20:38
cnt32_to_63.h	3.46 KB	-rw-r--r--	2024-03-10 20:38
coda.h	2.16 KB	-rw-r--r--	2024-03-10 20:38
compaction.h	4.5 KB	-rw-r--r--	2026-07-01 19:48
compat.h	32.32 KB	-rw-r--r--	2026-07-01 19:48
compiler-clang.h	4.5 KB	-rw-r--r--	2026-07-01 19:48
compiler-gcc.h	4.57 KB	-rw-r--r--	2026-07-01 19:48
compiler-version.h	517 B	-rw-r--r--	2024-03-10 20:38
compiler.h	7.87 KB	-rw-r--r--	2026-07-01 19:48
compiler_attributes.h	15.33 KB	-rw-r--r--	2026-07-01 19:48
compiler_types.h	17.21 KB	-rw-r--r--	2026-07-01 19:48
completion.h	4.14 KB	-rw-r--r--	2024-03-10 20:38
component.h	4.35 KB	-rw-r--r--	2024-03-10 20:38
configfs.h	8.35 KB	-rw-r--r--	2024-03-10 20:38
connector.h	4.01 KB	-rw-r--r--	2024-03-10 20:38
console.h	17.63 KB	-rw-r--r--	2026-07-01 19:48
console_struct.h	7.05 KB	-rw-r--r--	2024-03-10 20:38
consolemap.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
const.h	100 B	-rw-r--r--	2024-03-10 20:38
container.h	616 B	-rw-r--r--	2024-03-10 20:38
container_of.h	1.3 KB	-rw-r--r--	2024-03-10 20:38
context_tracking.h	4.15 KB	-rw-r--r--	2024-03-10 20:38
context_tracking_irq.h	633 B	-rw-r--r--	2026-07-01 19:48
context_tracking_state.h	3.84 KB	-rw-r--r--	2024-03-10 20:38
cookie.h	1.22 KB	-rw-r--r--	2024-03-10 20:38
cordic.h	2.08 KB	-rw-r--r--	2024-03-10 20:38
coredump.h	1.43 KB	-rw-r--r--	2024-03-10 20:38
coresight-pmu.h	1.86 KB	-rw-r--r--	2024-03-10 20:38
coresight-stm.h	152 B	-rw-r--r--	2024-03-10 20:38
coresight.h	21.27 KB	-rw-r--r--	2026-07-01 19:48
count_zeros.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
counter.h	21.39 KB	-rw-r--r--	2026-07-01 19:48
cper.h	17.75 KB	-rw-r--r--	2026-07-01 19:48
cpu.h	7.69 KB	-rw-r--r--	2026-07-01 19:48
cpu_cooling.h	1.86 KB	-rw-r--r--	2024-03-10 20:38
cpu_pm.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
cpu_rmap.h	1.7 KB	-rw-r--r--	2024-03-10 20:38
cpu_smt.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
cpufeature.h	1.71 KB	-rw-r--r--	2024-03-10 20:38
cpufreq.h	37 KB	-rw-r--r--	2026-07-01 19:48
cpuhotplug.h	16.78 KB	-rw-r--r--	2026-07-01 19:48
cpuidle.h	11.42 KB	-rw-r--r--	2024-03-10 20:38
cpuidle_haltpoll.h	312 B	-rw-r--r--	2024-03-10 20:38
cpumask.h	36.17 KB	-rw-r--r--	2026-07-01 19:48
cpumask_api.h	27 B	-rw-r--r--	2024-03-10 20:38
cpuset.h	7.94 KB	-rw-r--r--	2026-07-01 19:48
crash_core.h	4.92 KB	-rw-r--r--	2024-03-10 20:38
crash_dump.h	5.04 KB	-rw-r--r--	2024-03-10 20:38
crc-ccitt.h	369 B	-rw-r--r--	2024-03-10 20:38
crc-itu-t.h	530 B	-rw-r--r--	2024-03-10 20:38
crc-t10dif.h	453 B	-rw-r--r--	2024-03-10 20:38
crc16.h	540 B	-rw-r--r--	2024-03-10 20:38
crc32.h	2.83 KB	-rw-r--r--	2024-03-10 20:38
crc32c.h	293 B	-rw-r--r--	2024-03-10 20:38
crc32poly.h	610 B	-rw-r--r--	2024-03-10 20:38
crc4.h	192 B	-rw-r--r--	2024-03-10 20:38
crc64.h	539 B	-rw-r--r--	2024-03-10 20:38
crc7.h	316 B	-rw-r--r--	2024-03-10 20:38
crc8.h	3.66 KB	-rw-r--r--	2024-03-10 20:38
cred.h	12.46 KB	-rw-r--r--	2024-03-10 20:38
crypto.h	19.01 KB	-rw-r--r--	2024-03-10 20:38
cs5535.h	6.13 KB	-rw-r--r--	2024-03-10 20:38
ctype.h	1.87 KB	-rw-r--r--	2024-03-10 20:38
cuda.h	620 B	-rw-r--r--	2024-03-10 20:38
cxl-event.h	2.93 KB	-rw-r--r--	2024-03-10 20:38
damon.h	27.06 KB	-rw-r--r--	2026-07-01 19:48
dasd_mod.h	204 B	-rw-r--r--	2024-03-10 20:38
davinci_emac.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
dax.h	8.88 KB	-rw-r--r--	2024-03-10 20:38
dca.h	1.88 KB	-rw-r--r--	2024-03-10 20:38
dcache.h	18.11 KB	-rw-r--r--	2026-07-01 19:48
dccp.h	10.74 KB	-rw-r--r--	2024-03-10 20:38
debug_locks.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
debugfs.h	12.5 KB	-rw-r--r--	2024-03-10 20:38
debugobjects.h	3.99 KB	-rw-r--r--	2024-03-10 20:38
delay.h	2.47 KB	-rw-r--r--	2024-03-10 20:38
delayacct.h	6.76 KB	-rw-r--r--	2024-03-10 20:38
delayed_call.h	709 B	-rw-r--r--	2024-03-10 20:38
dev_printk.h	9.65 KB	-rw-r--r--	2026-07-01 19:48
devcoredump.h	2.21 KB	-rw-r--r--	2024-03-10 20:38
devfreq-event.h	5.95 KB	-rw-r--r--	2024-03-10 20:38
devfreq.h	14.52 KB	-rw-r--r--	2024-03-10 20:38
devfreq_cooling.h	2.7 KB	-rw-r--r--	2024-03-10 20:38
device-mapper.h	20.22 KB	-rw-r--r--	2024-03-10 20:38
device.h	44.36 KB	-rw-r--r--	2026-07-01 19:48
device_cgroup.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
devm-helpers.h	2.68 KB	-rw-r--r--	2024-03-10 20:38
devpts_fs.h	1.13 KB	-rw-r--r--	2024-03-10 20:38
dfl.h	2.72 KB	-rw-r--r--	2024-03-10 20:38
digsig.h	1.18 KB	-rw-r--r--	2024-03-10 20:38
dim.h	9.2 KB	-rw-r--r--	2024-03-10 20:38
dio.h	10.76 KB	-rw-r--r--	2024-03-10 20:38
dirent.h	215 B	-rw-r--r--	2024-03-10 20:38
dlm.h	5.62 KB	-rw-r--r--	2024-03-10 20:38
dlm_plock.h	642 B	-rw-r--r--	2024-03-10 20:38
dm-bufio.h	4.9 KB	-rw-r--r--	2024-03-10 20:38
dm-dirty-log.h	4 KB	-rw-r--r--	2024-03-10 20:38
dm-io.h	2.03 KB	-rw-r--r--	2026-07-01 19:48
dm-kcopyd.h	3.03 KB	-rw-r--r--	2024-03-10 20:38
dm-region-hash.h	3.16 KB	-rw-r--r--	2024-03-10 20:38
dm-verity-loadpin.h	617 B	-rw-r--r--	2024-03-10 20:38
dm9000.h	987 B	-rw-r--r--	2024-03-10 20:38
dma-buf.h	21.17 KB	-rw-r--r--	2024-03-10 20:38
dma-direct.h	3.62 KB	-rw-r--r--	2024-03-10 20:38
dma-direction.h	407 B	-rw-r--r--	2024-03-10 20:38
dma-fence-array.h	2.53 KB	-rw-r--r--	2024-03-10 20:38
dma-fence-chain.h	3.49 KB	-rw-r--r--	2024-03-10 20:38
dma-fence-unwrap.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
dma-fence.h	22.67 KB	-rw-r--r--	2024-03-10 20:38
dma-heap.h	1.58 KB	-rw-r--r--	2024-03-10 20:38
dma-map-ops.h	16.73 KB	-rw-r--r--	2024-03-10 20:38
dma-mapping.h	20.25 KB	-rw-r--r--	2026-07-01 19:48
dma-resv.h	16.94 KB	-rw-r--r--	2024-03-10 20:38
dmaengine.h	53.73 KB	-rw-r--r--	2024-03-10 20:38
dmapool.h	1.79 KB	-rw-r--r--	2024-03-10 20:38
dmar.h	8.11 KB	-rw-r--r--	2024-03-10 20:38
dmi.h	4.41 KB	-rw-r--r--	2026-07-01 19:48
dnotify.h	1012 B	-rw-r--r--	2024-03-10 20:38
dns_resolver.h	1.36 KB	-rw-r--r--	2024-03-10 20:38
dpll.h	6.56 KB	-rw-r--r--	2026-07-01 19:48
dqblk_qtree.h	2.19 KB	-rw-r--r--	2024-03-10 20:38
dqblk_v1.h	327 B	-rw-r--r--	2024-03-10 20:38
dqblk_v2.h	406 B	-rw-r--r--	2024-03-10 20:38
drbd.h	9.92 KB	-rw-r--r--	2024-03-10 20:38
drbd_config.h	285 B	-rw-r--r--	2024-03-10 20:38
drbd_genl.h	21.49 KB	-rw-r--r--	2024-03-10 20:38
drbd_genl_api.h	1.76 KB	-rw-r--r--	2024-03-10 20:38
drbd_limits.h	7.92 KB	-rw-r--r--	2024-03-10 20:38
ds2782_battery.h	158 B	-rw-r--r--	2024-03-10 20:38
dtlk.h	3.5 KB	-rw-r--r--	2024-03-10 20:38
dtpm.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
dw_apb_timer.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
dynamic_debug.h	11 KB	-rw-r--r--	2024-03-10 20:38
dynamic_queue_limits.h	3.74 KB	-rw-r--r--	2026-07-01 19:48
earlycpio.h	359 B	-rw-r--r--	2024-03-10 20:38
ecryptfs.h	3.82 KB	-rw-r--r--	2024-03-10 20:38
edac.h	19.44 KB	-rw-r--r--	2024-03-10 20:38
edd.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
eeprom_93cx6.h	2.64 KB	-rw-r--r--	2026-07-01 19:48
eeprom_93xx46.h	1.04 KB	-rw-r--r--	2024-03-10 20:38
efi-bgrt.h	644 B	-rw-r--r--	2024-03-10 20:38
efi.h	45.27 KB	-rw-r--r--	2026-07-01 19:48
efi_embedded_fw.h	1.04 KB	-rw-r--r--	2024-03-10 20:38
efs_vh.h	1.55 KB	-rw-r--r--	2024-03-10 20:38
eisa.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
elf-fdpic.h	2.39 KB	-rw-r--r--	2024-03-10 20:38
elf-randomize.h	583 B	-rw-r--r--	2024-03-10 20:38
elf.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
elfcore-compat.h	1.43 KB	-rw-r--r--	2024-03-10 20:38
elfcore.h	3.93 KB	-rw-r--r--	2024-03-10 20:38
elfnote-lto.h	314 B	-rw-r--r--	2024-03-10 20:38
elfnote.h	3.54 KB	-rw-r--r--	2024-03-10 20:38
enclosure.h	4.02 KB	-rw-r--r--	2024-03-10 20:38
energy_model.h	11.54 KB	-rw-r--r--	2024-03-10 20:38
entry-common.h	18.58 KB	-rw-r--r--	2024-03-10 20:38
entry-kvm.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
err.h	2.94 KB	-rw-r--r--	2026-07-01 19:48
errname.h	283 B	-rw-r--r--	2024-03-10 20:38
errno.h	1.45 KB	-rw-r--r--	2024-03-10 20:38
error-injection.h	630 B	-rw-r--r--	2024-03-10 20:38
errqueue.h	524 B	-rw-r--r--	2024-03-10 20:38
errseq.h	382 B	-rw-r--r--	2024-03-10 20:38
etherdevice.h	19.27 KB	-rw-r--r--	2026-07-01 19:48
ethtool.h	43.95 KB	-rw-r--r--	2026-07-01 19:48
ethtool_netlink.h	3.25 KB	-rw-r--r--	2024-03-10 20:38
eventfd.h	2.1 KB	-rw-r--r--	2024-03-10 20:38
eventpoll.h	2.41 KB	-rw-r--r--	2026-07-01 19:48
evm.h	4.91 KB	-rw-r--r--	2024-03-10 20:38
export-internal.h	2.3 KB	-rw-r--r--	2024-03-10 20:38
export.h	2.21 KB	-rw-r--r--	2026-07-01 19:48
exportfs.h	10.21 KB	-rw-r--r--	2024-03-10 20:38
ext2_fs.h	967 B	-rw-r--r--	2024-03-10 20:38
extable.h	1.28 KB	-rw-r--r--	2024-03-10 20:38
extcon-provider.h	3.83 KB	-rw-r--r--	2024-03-10 20:38
extcon.h	9.99 KB	-rw-r--r--	2024-03-10 20:38
f2fs_fs.h	20.13 KB	-rw-r--r--	2026-07-01 19:48
f75375s.h	541 B	-rw-r--r--	2024-03-10 20:38
falloc.h	1.79 KB	-rw-r--r--	2026-07-01 19:48
fanotify.h	4.67 KB	-rw-r--r--	2026-07-01 19:48
fault-inject-usercopy.h	496 B	-rw-r--r--	2024-03-10 20:38
fault-inject.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
fb.h	29.42 KB	-rw-r--r--	2026-07-01 19:48
fbcon.h	2.2 KB	-rw-r--r--	2026-07-01 19:48
fcdevice.h	774 B	-rw-r--r--	2024-03-10 20:38
fcntl.h	1.66 KB	-rw-r--r--	2024-03-10 20:38
fd.h	490 B	-rw-r--r--	2024-03-10 20:38
fddidevice.h	833 B	-rw-r--r--	2024-03-10 20:38
fdtable.h	3.46 KB	-rw-r--r--	2026-07-01 19:48
fec.h	463 B	-rw-r--r--	2024-03-10 20:38
fiemap.h	713 B	-rw-r--r--	2024-03-10 20:38
file.h	3.19 KB	-rw-r--r--	2026-07-01 19:48
fileattr.h	1.9 KB	-rw-r--r--	2024-03-10 20:38
filelock.h	11.44 KB	-rw-r--r--	2024-03-10 20:38
filter.h	45.03 KB	-rw-r--r--	2026-07-01 19:48
find.h	19.62 KB	-rw-r--r--	2024-03-10 20:38
fips.h	303 B	-rw-r--r--	2024-03-10 20:38
firewire.h	16.41 KB	-rw-r--r--	2024-03-10 20:38
firmware-map.h	959 B	-rw-r--r--	2024-03-10 20:38
firmware.h	5.81 KB	-rw-r--r--	2024-03-10 20:38
fixp-arith.h	4.21 KB	-rw-r--r--	2024-03-10 20:38
flat.h	2.57 KB	-rw-r--r--	2024-03-10 20:38
flex_proportions.h	2.83 KB	-rw-r--r--	2024-03-10 20:38
font.h	1.67 KB	-rw-r--r--	2024-03-10 20:38
fortify-string.h	26.73 KB	-rw-r--r--	2026-07-01 19:48
fprobe.h	3.15 KB	-rw-r--r--	2024-03-10 20:38
freezer.h	2.34 KB	-rw-r--r--	2024-03-10 20:38
fs.h	117.06 KB	-rw-r--r--	2026-07-01 19:48
fs_api.h	22 B	-rw-r--r--	2024-03-10 20:38
fs_context.h	8.18 KB	-rw-r--r--	2026-07-01 19:48
fs_parser.h	4.67 KB	-rw-r--r--	2026-07-01 19:48
fs_pin.h	539 B	-rw-r--r--	2024-03-10 20:38
fs_stack.h	895 B	-rw-r--r--	2024-03-10 20:38
fs_struct.h	1.04 KB	-rw-r--r--	2024-03-10 20:38
fs_types.h	2.02 KB	-rw-r--r--	2024-03-10 20:38
fscache-cache.h	7.09 KB	-rw-r--r--	2026-07-01 19:48
fscache.h	23.85 KB	-rw-r--r--	2024-03-10 20:38
fscrypt.h	32.98 KB	-rw-r--r--	2024-03-10 20:38
fsi-occ.h	715 B	-rw-r--r--	2024-03-10 20:38
fsi-sbefifo.h	629 B	-rw-r--r--	2024-03-10 20:38
fsi.h	2.26 KB	-rw-r--r--	2024-03-10 20:38
fsl-diu-fb.h	3.87 KB	-rw-r--r--	2024-03-10 20:38
fsl_devices.h	4.16 KB	-rw-r--r--	2024-03-10 20:38
fsl_hypervisor.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
fsl_ifc.h	24.48 KB	-rw-r--r--	2024-03-10 20:38
fsldma.h	202 B	-rw-r--r--	2024-03-10 20:38
fsnotify.h	10.93 KB	-rw-r--r--	2026-07-01 19:48
fsnotify_backend.h	29.13 KB	-rw-r--r--	2026-07-01 19:48
fsverity.h	9.29 KB	-rw-r--r--	2024-03-10 20:38
ftrace.h	38.74 KB	-rw-r--r--	2026-07-01 19:48
ftrace_irq.h	884 B	-rw-r--r--	2024-03-10 20:38
futex.h	2.44 KB	-rw-r--r--	2024-03-10 20:38
fw_table.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
fwnode.h	8.12 KB	-rw-r--r--	2026-07-01 19:48
fwnode_mdio.h	858 B	-rw-r--r--	2024-03-10 20:38
gameport.h	5.24 KB	-rw-r--r--	2024-03-10 20:38
gcd.h	193 B	-rw-r--r--	2024-03-10 20:38
genalloc.h	7.73 KB	-rw-r--r--	2026-07-01 19:48
generic-radix-tree.h	8.33 KB	-rw-r--r--	2024-03-10 20:38
genetlink.h	589 B	-rw-r--r--	2024-03-10 20:38
genl_magic_func.h	11.67 KB	-rw-r--r--	2024-03-10 20:38
genl_magic_struct.h	7.58 KB	-rw-r--r--	2024-03-10 20:38
getcpu.h	641 B	-rw-r--r--	2024-03-10 20:38
gfp.h	12.06 KB	-rw-r--r--	2026-07-01 19:48
gfp_api.h	23 B	-rw-r--r--	2024-03-10 20:38
gfp_types.h	14.98 KB	-rw-r--r--	2026-07-01 19:48
glob.h	256 B	-rw-r--r--	2024-03-10 20:38
gnss.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
goldfish.h	878 B	-rw-r--r--	2024-03-10 20:38
gpio-pxa.h	571 B	-rw-r--r--	2024-03-10 20:38
gpio.h	5.44 KB	-rw-r--r--	2024-03-10 20:38
gpio_keys.h	1.81 KB	-rw-r--r--	2024-03-10 20:38
greybus.h	4.14 KB	-rw-r--r--	2024-03-10 20:38
group_cpus.h	310 B	-rw-r--r--	2024-03-10 20:38
hardirq.h	3.25 KB	-rw-r--r--	2024-03-10 20:38
hash.h	2.93 KB	-rw-r--r--	2024-03-10 20:38
hashtable.h	6.67 KB	-rw-r--r--	2024-03-10 20:38
hashtable_api.h	29 B	-rw-r--r--	2024-03-10 20:38
hdlc.h	3.19 KB	-rw-r--r--	2024-03-10 20:38
hdlcdrv.h	6.32 KB	-rw-r--r--	2024-03-10 20:38
hdmi.h	12.55 KB	-rw-r--r--	2024-03-10 20:38
hex.h	884 B	-rw-r--r--	2024-03-10 20:38
hid-debug.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
hid-roccat.h	490 B	-rw-r--r--	2024-03-10 20:38
hid-sensor-hub.h	8.97 KB	-rw-r--r--	2024-03-10 20:38
hid-sensor-ids.h	7.49 KB	-rw-r--r--	2024-03-10 20:38
hid.h	38.89 KB	-rw-r--r--	2026-07-01 19:48
hid_bpf.h	5.24 KB	-rw-r--r--	2024-03-10 20:38
hidden.h	966 B	-rw-r--r--	2024-03-10 20:38
hiddev.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
hidraw.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
highmem-internal.h	6.74 KB	-rw-r--r--	2024-03-10 20:38
highmem.h	18.04 KB	-rw-r--r--	2026-07-01 19:48
highuid.h	3.12 KB	-rw-r--r--	2024-03-10 20:38
hil.h	18.42 KB	-rw-r--r--	2024-03-10 20:38
hil_mlc.h	5.13 KB	-rw-r--r--	2024-03-10 20:38
hippidevice.h	1.08 KB	-rw-r--r--	2024-03-10 20:38
hisi_acc_qm.h	14.04 KB	-rw-r--r--	2026-07-01 19:48
hmm.h	3.93 KB	-rw-r--r--	2024-03-10 20:38
host1x.h	13.49 KB	-rw-r--r--	2024-03-10 20:38
host1x_context_bus.h	331 B	-rw-r--r--	2024-03-10 20:38
hp_sdc.h	14.01 KB	-rw-r--r--	2024-03-10 20:38
hpet.h	2.55 KB	-rw-r--r--	2024-03-10 20:38
hrtimer.h	14.87 KB	-rw-r--r--	2026-07-01 19:48
hrtimer_api.h	27 B	-rw-r--r--	2024-03-10 20:38
hrtimer_defs.h	660 B	-rw-r--r--	2024-03-10 20:38
hrtimer_types.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
hte.h	7.37 KB	-rw-r--r--	2024-03-10 20:38
huge_mm.h	16.06 KB	-rw-r--r--	2026-07-01 19:48
hugetlb.h	35.76 KB	-rw-r--r--	2026-07-01 19:48
hugetlb_cgroup.h	6.78 KB	-rw-r--r--	2024-03-10 20:38
hugetlb_inline.h	374 B	-rw-r--r--	2024-03-10 20:38
hw_breakpoint.h	4.19 KB	-rw-r--r--	2024-03-10 20:38
hw_random.h	2.25 KB	-rw-r--r--	2024-03-10 20:38
hwmon-sysfs.h	2.8 KB	-rw-r--r--	2024-03-10 20:38
hwmon-vid.h	862 B	-rw-r--r--	2024-03-10 20:38
hwmon.h	15.58 KB	-rw-r--r--	2024-03-10 20:38
hwspinlock.h	15.79 KB	-rw-r--r--	2026-07-01 19:48
hyperv.h	49.49 KB	-rw-r--r--	2026-07-01 19:48
hypervisor.h	799 B	-rw-r--r--	2026-07-01 19:48
i2c-algo-bit.h	1.4 KB	-rw-r--r--	2024-03-10 20:38
i2c-algo-pca.h	2.89 KB	-rw-r--r--	2024-03-10 20:38
i2c-algo-pcf.h	1.21 KB	-rw-r--r--	2024-03-10 20:38
i2c-atr.h	3.95 KB	-rw-r--r--	2024-03-10 20:38
i2c-dev.h	371 B	-rw-r--r--	2024-03-10 20:38
i2c-mux.h	1.63 KB	-rw-r--r--	2024-03-10 20:38
i2c-smbus.h	1.52 KB	-rw-r--r--	2024-03-10 20:38
i2c.h	39.03 KB	-rw-r--r--	2026-07-01 19:48
i8042.h	2.02 KB	-rw-r--r--	2024-03-10 20:38
i8253.h	808 B	-rw-r--r--	2026-07-01 19:48
i8254.h	489 B	-rw-r--r--	2024-03-10 20:38
icmp.h	1 KB	-rw-r--r--	2024-03-10 20:38
icmpv6.h	2.87 KB	-rw-r--r--	2024-03-10 20:38
idle_inject.h	1.02 KB	-rw-r--r--	2024-03-10 20:38
idr.h	9.72 KB	-rw-r--r--	2024-03-10 20:38
ieee80211.h	168.2 KB	-rw-r--r--	2026-07-01 19:48
ieee802154.h	14.46 KB	-rw-r--r--	2024-03-10 20:38
if_arp.h	1.81 KB	-rw-r--r--	2024-03-10 20:38
if_bridge.h	5.42 KB	-rw-r--r--	2026-07-01 19:48
if_eql.h	1.13 KB	-rw-r--r--	2024-03-10 20:38
if_ether.h	1.3 KB	-rw-r--r--	2026-07-01 19:48
if_fddi.h	3.24 KB	-rw-r--r--	2024-03-10 20:38
if_hsr.h	1.07 KB	-rw-r--r--	2024-03-10 20:38
if_link.h	592 B	-rw-r--r--	2024-03-10 20:38
if_ltalk.h	188 B	-rw-r--r--	2024-03-10 20:38
if_macvlan.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
if_phonet.h	319 B	-rw-r--r--	2024-03-10 20:38
if_pppol2tp.h	501 B	-rw-r--r--	2024-03-10 20:38
if_pppox.h	2.83 KB	-rw-r--r--	2024-03-10 20:38
if_rmnet.h	2.06 KB	-rw-r--r--	2024-03-10 20:38
if_tap.h	2.21 KB	-rw-r--r--	2024-03-10 20:38
if_team.h	7.94 KB	-rw-r--r--	2024-03-10 20:38
if_tun.h	1.55 KB	-rw-r--r--	2024-03-10 20:38
if_tunnel.h	409 B	-rw-r--r--	2024-03-10 20:38
if_vlan.h	21.92 KB	-rw-r--r--	2026-07-01 19:48
igmp.h	4.36 KB	-rw-r--r--	2024-03-10 20:38
ihex.h	2.15 KB	-rw-r--r--	2024-03-10 20:38
ima.h	6.67 KB	-rw-r--r--	2026-07-01 19:48
imx-media.h	605 B	-rw-r--r--	2024-03-10 20:38
in.h	2.29 KB	-rw-r--r--	2024-03-10 20:38
in6.h	1.63 KB	-rw-r--r--	2024-03-10 20:38
indirect_call_wrapper.h	2.38 KB	-rw-r--r--	2026-07-01 19:48
inet.h	2.64 KB	-rw-r--r--	2024-03-10 20:38
inet_diag.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
inetdevice.h	9.02 KB	-rw-r--r--	2026-07-01 19:48
init.h	12.28 KB	-rw-r--r--	2026-07-01 19:48
init_ohci1394_dma.h	196 B	-rw-r--r--	2024-03-10 20:38
init_syscalls.h	1.01 KB	-rw-r--r--	2024-03-10 20:38
init_task.h	1.1 KB	-rw-r--r--	2024-03-10 20:38
initrd.h	1008 B	-rw-r--r--	2024-03-10 20:38
inotify.h	628 B	-rw-r--r--	2024-03-10 20:38
input.h	20.03 KB	-rw-r--r--	2024-03-10 20:38
instruction_pointer.h	346 B	-rw-r--r--	2024-03-10 20:38
instrumentation.h	1.96 KB	-rw-r--r--	2024-03-10 20:38
instrumented.h	5.15 KB	-rw-r--r--	2024-03-10 20:38
int_log.h	1.26 KB	-rw-r--r--	2024-03-10 20:38
integrity.h	1.15 KB	-rw-r--r--	2024-03-10 20:38
intel-ish-client-if.h	4.29 KB	-rw-r--r--	2026-07-01 19:48
intel_rapl.h	5.01 KB	-rw-r--r--	2026-07-01 19:48
intel_tcc.h	466 B	-rw-r--r--	2026-07-01 19:48
intel_th.h	2.44 KB	-rw-r--r--	2024-03-10 20:38
intel_tpmi.h	1.64 KB	-rw-r--r--	2024-03-10 20:38
interconnect-clk.h	466 B	-rw-r--r--	2024-03-10 20:38
interconnect-provider.h	5.5 KB	-rw-r--r--	2024-03-10 20:38
interconnect.h	3.36 KB	-rw-r--r--	2024-03-10 20:38
interrupt.h	25.4 KB	-rw-r--r--	2026-07-01 19:48
interval_tree.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
interval_tree_generic.h	6.7 KB	-rw-r--r--	2024-03-10 20:38
io-64-nonatomic-hi-lo.h	2.41 KB	-rw-r--r--	2024-03-10 20:38
io-64-nonatomic-lo-hi.h	2.41 KB	-rw-r--r--	2024-03-10 20:38
io-mapping.h	4.69 KB	-rw-r--r--	2024-03-10 20:38
io-pgtable.h	9.58 KB	-rw-r--r--	2024-03-10 20:38
io.h	5.2 KB	-rw-r--r--	2026-07-01 19:48
io_uring.h	1.23 KB	-rw-r--r--	2026-07-01 19:48
io_uring_types.h	17.46 KB	-rw-r--r--	2026-07-01 19:48
ioam6.h	226 B	-rw-r--r--	2024-03-10 20:38
ioam6_genl.h	266 B	-rw-r--r--	2024-03-10 20:38
ioam6_iptunnel.h	285 B	-rw-r--r--	2024-03-10 20:38
iocontext.h	4.16 KB	-rw-r--r--	2024-03-10 20:38
iomap.h	14.46 KB	-rw-r--r--	2026-07-01 19:48
iommu-helper.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
iommu.h	47.63 KB	-rw-r--r--	2026-07-01 19:48
iommufd.h	3.5 KB	-rw-r--r--	2024-03-10 20:38
iopoll.h	7.98 KB	-rw-r--r--	2024-03-10 20:38
ioport.h	13.83 KB	-rw-r--r--	2026-07-01 19:48
ioprio.h	2.17 KB	-rw-r--r--	2026-07-01 19:48
ioremap.h	719 B	-rw-r--r--	2024-03-10 20:38
iosys-map.h	16.73 KB	-rw-r--r--	2026-07-01 19:48
iov_iter.h	7.12 KB	-rw-r--r--	2024-03-10 20:38
iova.h	4.08 KB	-rw-r--r--	2024-03-10 20:38
iova_bitmap.h	1.31 KB	-rw-r--r--	2024-03-10 20:38
ip.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
ipack.h	8.69 KB	-rw-r--r--	2024-03-10 20:38
ipc.h	619 B	-rw-r--r--	2024-03-10 20:38
ipc_namespace.h	5.63 KB	-rw-r--r--	2026-07-01 19:48
ipmi.h	11.09 KB	-rw-r--r--	2024-03-10 20:38
ipmi_smi.h	9.83 KB	-rw-r--r--	2024-03-10 20:38
ipv6.h	8.01 KB	-rw-r--r--	2024-03-10 20:38
ipv6_route.h	372 B	-rw-r--r--	2024-03-10 20:38
irq.h	42.29 KB	-rw-r--r--	2026-07-01 19:48
irq_poll.h	575 B	-rw-r--r--	2024-03-10 20:38
irq_sim.h	789 B	-rw-r--r--	2024-03-10 20:38
irq_work.h	2.04 KB	-rw-r--r--	2024-03-10 20:38
irqbypass.h	3.45 KB	-rw-r--r--	2024-03-10 20:38
irqchip.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
irqdesc.h	7.81 KB	-rw-r--r--	2024-03-10 20:38
irqdomain.h	20.39 KB	-rw-r--r--	2024-03-10 20:38
irqdomain_defs.h	820 B	-rw-r--r--	2024-03-10 20:38
irqflags.h	7.75 KB	-rw-r--r--	2026-07-01 19:48
irqflags_types.h	563 B	-rw-r--r--	2024-03-10 20:38
irqhandler.h	300 B	-rw-r--r--	2024-03-10 20:38
irqnr.h	856 B	-rw-r--r--	2024-03-10 20:38
irqreturn.h	529 B	-rw-r--r--	2024-03-10 20:38
isa-dma.h	276 B	-rw-r--r--	2024-03-10 20:38
isa.h	3.33 KB	-rw-r--r--	2024-03-10 20:38
isapnp.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
iscsi_boot_sysfs.h	3.71 KB	-rw-r--r--	2024-03-10 20:38
iscsi_ibft.h	994 B	-rw-r--r--	2024-03-10 20:38
ism.h	2.2 KB	-rw-r--r--	2026-07-01 19:48
iversion.h	10.96 KB	-rw-r--r--	2024-03-10 20:38
jbd2.h	51.7 KB	-rw-r--r--	2026-07-01 19:48
jhash.h	4.56 KB	-rw-r--r--	2024-03-10 20:38
jiffies.h	19.67 KB	-rw-r--r--	2026-07-01 19:48
journal-head.h	2.91 KB	-rw-r--r--	2024-03-10 20:38
joystick.h	437 B	-rw-r--r--	2024-03-10 20:38
jump_label.h	16.25 KB	-rw-r--r--	2024-03-10 20:38
jump_label_ratelimit.h	2.77 KB	-rw-r--r--	2024-03-10 20:38
jz4740-adc.h	1023 B	-rw-r--r--	2024-03-10 20:38
jz4780-nemc.h	976 B	-rw-r--r--	2024-03-10 20:38
kallsyms.h	4.26 KB	-rw-r--r--	2026-07-01 19:48
kasan-checks.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
kasan-enabled.h	639 B	-rw-r--r--	2024-03-10 20:38
kasan-tags.h	487 B	-rw-r--r--	2024-03-10 20:38
kasan.h	19.22 KB	-rw-r--r--	2026-07-01 19:48
kbd_diacr.h	198 B	-rw-r--r--	2024-03-10 20:38
kbd_kern.h	3.6 KB	-rw-r--r--	2024-03-10 20:38
kbuild.h	380 B	-rw-r--r--	2024-03-10 20:38
kconfig.h	2.63 KB	-rw-r--r--	2024-03-10 20:38
kcore.h	891 B	-rw-r--r--	2024-03-10 20:38
kcov.h	3.16 KB	-rw-r--r--	2026-07-01 19:48
kcsan-checks.h	18.63 KB	-rw-r--r--	2024-03-10 20:38
kcsan.h	2.19 KB	-rw-r--r--	2024-03-10 20:38
kdb.h	7.43 KB	-rw-r--r--	2024-03-10 20:38
kdebug.h	487 B	-rw-r--r--	2024-03-10 20:38
kdev_t.h	1.8 KB	-rw-r--r--	2024-03-10 20:38
kern_levels.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
kernel-page-flags.h	551 B	-rw-r--r--	2024-03-10 20:38
kernel.h	14.07 KB	-rw-r--r--	2024-03-10 20:38
kernel_read_file.h	1.62 KB	-rw-r--r--	2024-03-10 20:38
kernel_stat.h	3.37 KB	-rw-r--r--	2024-03-10 20:38
kernelcapi.h	1.45 KB	-rw-r--r--	2024-03-10 20:38
kernfs.h	19.49 KB	-rw-r--r--	2026-07-01 19:48
kexec.h	14.09 KB	-rw-r--r--	2026-07-01 19:48
key-type.h	6.63 KB	-rw-r--r--	2024-03-10 20:38
key.h	16.05 KB	-rw-r--r--	2024-03-10 20:38
keyboard.h	665 B	-rw-r--r--	2024-03-10 20:38
keyctl.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
kfence.h	8.72 KB	-rw-r--r--	2026-07-01 19:48
kfifo.h	26.18 KB	-rw-r--r--	2024-03-10 20:38
kgdb.h	12.12 KB	-rw-r--r--	2024-03-10 20:38
khugepaged.h	1.77 KB	-rw-r--r--	2024-03-10 20:38
klist.h	1.88 KB	-rw-r--r--	2024-03-10 20:38
kmemleak.h	3.12 KB	-rw-r--r--	2024-03-10 20:38
kmod.h	1.02 KB	-rw-r--r--	2024-03-10 20:38
kmsan-checks.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
kmsan.h	9.24 KB	-rw-r--r--	2024-03-10 20:38
kmsan_string.h	681 B	-rw-r--r--	2024-03-10 20:38
kmsan_types.h	908 B	-rw-r--r--	2024-03-10 20:38
kmsg_dump.h	2.71 KB	-rw-r--r--	2024-03-10 20:38
kobj_map.h	545 B	-rw-r--r--	2024-03-10 20:38
kobject.h	6.95 KB	-rw-r--r--	2024-03-10 20:38
kobject_api.h	27 B	-rw-r--r--	2024-03-10 20:38
kobject_ns.h	1.91 KB	-rw-r--r--	2024-03-10 20:38
kprobes.h	16.45 KB	-rw-r--r--	2026-07-01 19:48
kref.h	3.08 KB	-rw-r--r--	2024-03-10 20:38
kref_api.h	24 B	-rw-r--r--	2024-03-10 20:38
ks0108.h	970 B	-rw-r--r--	2024-03-10 20:38
ks8842.h	632 B	-rw-r--r--	2024-03-10 20:38
ks8851_mll.h	472 B	-rw-r--r--	2024-03-10 20:38
ksm.h	4.31 KB	-rw-r--r--	2026-07-01 19:48
kstrtox.h	6.51 KB	-rw-r--r--	2024-03-10 20:38
kthread.h	7 KB	-rw-r--r--	2024-03-10 20:38
ktime.h	5.33 KB	-rw-r--r--	2024-03-10 20:38
ktime_api.h	25 B	-rw-r--r--	2024-03-10 20:38
kvm_dirty_ring.h	2.68 KB	-rw-r--r--	2024-03-10 20:38
kvm_host.h	73.35 KB	-rw-r--r--	2026-07-01 19:48
kvm_irqfd.h	1.99 KB	-rw-r--r--	2024-03-10 20:38
kvm_para.h	402 B	-rw-r--r--	2024-03-10 20:38
kvm_types.h	2.79 KB	-rw-r--r--	2024-03-10 20:38
l2tp.h	261 B	-rw-r--r--	2024-03-10 20:38
lantiq.h	365 B	-rw-r--r--	2024-03-10 20:38
lapb.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
latencytop.h	1.06 KB	-rw-r--r--	2024-03-10 20:38
lcd.h	3.78 KB	-rw-r--r--	2024-03-10 20:38
lcm.h	275 B	-rw-r--r--	2024-03-10 20:38
led-class-flash.h	6.74 KB	-rw-r--r--	2024-03-10 20:38
led-class-multicolor.h	3.26 KB	-rw-r--r--	2024-03-10 20:38
led-lm3530.h	3.7 KB	-rw-r--r--	2024-03-10 20:38
leds-bd2802.h	476 B	-rw-r--r--	2024-03-10 20:38
leds-lp3944.h	950 B	-rw-r--r--	2024-03-10 20:38
leds-lp3952.h	2.35 KB	-rw-r--r--	2024-03-10 20:38
leds-pca9532.h	866 B	-rw-r--r--	2024-03-10 20:38
leds-regulator.h	1.14 KB	-rw-r--r--	2024-03-10 20:38
leds-ti-lmu-common.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
leds.h	22.56 KB	-rw-r--r--	2026-07-01 19:48
libata.h	68.03 KB	-rw-r--r--	2026-07-01 19:48
libfdt.h	202 B	-rw-r--r--	2024-03-10 20:38
libfdt_env.h	491 B	-rw-r--r--	2024-03-10 20:38
libgcc.h	810 B	-rw-r--r--	2024-03-10 20:38
libnvdimm.h	9.93 KB	-rw-r--r--	2024-03-10 20:38
libps2.h	2.47 KB	-rw-r--r--	2024-03-10 20:38
license.h	418 B	-rw-r--r--	2024-03-10 20:38
limits.h	809 B	-rw-r--r--	2024-03-10 20:38
linear_range.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
linkage.h	9.56 KB	-rw-r--r--	2024-03-10 20:38
linkmode.h	2.5 KB	-rw-r--r--	2024-03-10 20:38
linux_logo.h	1.91 KB	-rw-r--r--	2024-03-10 20:38
lis3lv02d.h	5 KB	-rw-r--r--	2024-03-10 20:38
list.h	35.11 KB	-rw-r--r--	2024-03-10 20:38
list_bl.h	4.79 KB	-rw-r--r--	2024-03-10 20:38
list_lru.h	9.12 KB	-rw-r--r--	2024-03-10 20:38
list_nulls.h	4.22 KB	-rw-r--r--	2024-03-10 20:38
list_sort.h	374 B	-rw-r--r--	2024-03-10 20:38
litex.h	2.06 KB	-rw-r--r--	2024-03-10 20:38
livepatch.h	8.23 KB	-rw-r--r--	2024-03-10 20:38
livepatch_sched.h	802 B	-rw-r--r--	2024-03-10 20:38
llc.h	749 B	-rw-r--r--	2024-03-10 20:38
llist.h	10.43 KB	-rw-r--r--	2024-03-10 20:38
llist_api.h	25 B	-rw-r--r--	2024-03-10 20:38
local_lock.h	1.33 KB	-rw-r--r--	2024-03-10 20:38
local_lock_internal.h	3.42 KB	-rw-r--r--	2024-03-10 20:38
lockdep.h	20.16 KB	-rw-r--r--	2026-07-01 19:48
lockdep_api.h	27 B	-rw-r--r--	2024-03-10 20:38
lockdep_types.h	7.56 KB	-rw-r--r--	2024-03-10 20:38
lockref.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
log2.h	6.23 KB	-rw-r--r--	2024-03-10 20:38
logic_iomem.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
logic_pio.h	3.09 KB	-rw-r--r--	2024-03-10 20:38
lp.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
lru_cache.h	11.66 KB	-rw-r--r--	2024-03-10 20:38
lsm_audit.h	2.87 KB	-rw-r--r--	2024-03-10 20:38
lsm_hook_defs.h	22.43 KB	-rw-r--r--	2026-07-01 19:48
lsm_hooks.h	4.84 KB	-rw-r--r--	2026-07-01 19:48
lwq.h	3.69 KB	-rw-r--r--	2024-03-10 20:38
lz4.h	26.44 KB	-rw-r--r--	2024-03-10 20:38
lzo.h	1.93 KB	-rw-r--r--	2026-07-01 19:48
mISDNdsp.h	1.19 KB	-rw-r--r--	2024-03-10 20:38
mISDNhw.h	5.39 KB	-rw-r--r--	2024-03-10 20:38
mISDNif.h	14.9 KB	-rw-r--r--	2024-03-10 20:38
mailbox_client.h	1.78 KB	-rw-r--r--	2026-07-01 19:48
mailbox_controller.h	5.88 KB	-rw-r--r--	2026-07-01 19:48
map_benchmark.h	1.11 KB	-rw-r--r--	2026-07-01 19:48
maple.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
maple_tree.h	28.19 KB	-rw-r--r--	2026-07-01 19:48
marvell_phy.h	1.74 KB	-rw-r--r--	2024-03-10 20:38
math.h	6.27 KB	-rw-r--r--	2026-07-01 19:48
math64.h	8.28 KB	-rw-r--r--	2024-03-10 20:38
mbcache.h	2.09 KB	-rw-r--r--	2024-03-10 20:38
mbus.h	3.09 KB	-rw-r--r--	2024-03-10 20:38
mc146818rtc.h	4.72 KB	-rw-r--r--	2024-03-10 20:38
mc6821.h	1.18 KB	-rw-r--r--	2024-03-10 20:38
mcb.h	3.67 KB	-rw-r--r--	2024-03-10 20:38
mdev.h	2.36 KB	-rw-r--r--	2024-03-10 20:38
mdio-bitbang.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
mdio-gpio.h	177 B	-rw-r--r--	2024-03-10 20:38
mdio-mux.h	1021 B	-rw-r--r--	2024-03-10 20:38
mdio.h	21.24 KB	-rw-r--r--	2026-07-01 19:48
mei_aux.h	929 B	-rw-r--r--	2024-03-10 20:38
mei_cl_bus.h	4.6 KB	-rw-r--r--	2024-03-10 20:38
mem_encrypt.h	780 B	-rw-r--r--	2024-03-10 20:38
memblock.h	21.04 KB	-rw-r--r--	2024-03-10 20:38
memcontrol.h	47.92 KB	-rw-r--r--	2026-07-01 19:48
memfd.h	717 B	-rw-r--r--	2026-07-01 19:48
memory-tiers.h	3.5 KB	-rw-r--r--	2026-07-01 19:48
memory.h	6.39 KB	-rw-r--r--	2026-07-01 19:48
memory_hotplug.h	11.84 KB	-rw-r--r--	2026-07-01 19:48
mempolicy.h	7.25 KB	-rw-r--r--	2026-07-01 19:48
mempool.h	3.52 KB	-rw-r--r--	2024-03-10 20:38
memregion.h	1.8 KB	-rw-r--r--	2024-03-10 20:38
memremap.h	7.67 KB	-rw-r--r--	2026-07-01 19:48
memstick.h	9.6 KB	-rw-r--r--	2024-03-10 20:38
mhi.h	26.78 KB	-rw-r--r--	2024-03-10 20:38
mhi_ep.h	10.63 KB	-rw-r--r--	2024-03-10 20:38
micrel_phy.h	2.13 KB	-rw-r--r--	2024-03-10 20:38
microchipphy.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
migrate.h	7.81 KB	-rw-r--r--	2026-07-01 19:48
migrate_mode.h	985 B	-rw-r--r--	2024-03-10 20:38
mii.h	15.49 KB	-rw-r--r--	2024-03-10 20:38
mii_timestamper.h	3.66 KB	-rw-r--r--	2024-03-10 20:38
min_heap.h	3.3 KB	-rw-r--r--	2024-03-10 20:38
minmax.h	10.05 KB	-rw-r--r--	2026-07-01 19:48
misc_cgroup.h	2.94 KB	-rw-r--r--	2024-03-10 20:38
miscdevice.h	3.21 KB	-rw-r--r--	2024-03-10 20:38
mm.h	129.25 KB	-rw-r--r--	2026-07-01 19:48
mm_api.h	22 B	-rw-r--r--	2024-03-10 20:38
mm_inline.h	16.7 KB	-rw-r--r--	2024-03-10 20:38
mm_types.h	45.26 KB	-rw-r--r--	2026-07-01 19:48
mm_types_task.h	1.9 KB	-rw-r--r--	2024-03-10 20:38
mman.h	5.48 KB	-rw-r--r--	2026-07-01 19:48
mmap_lock.h	5.04 KB	-rw-r--r--	2026-07-01 19:48
mmdebug.h	3.86 KB	-rw-r--r--	2026-07-01 19:48
mmiotrace.h	3.05 KB	-rw-r--r--	2024-03-10 20:38
mmu_context.h	1.06 KB	-rw-r--r--	2024-03-10 20:38
mmu_notifier.h	23.4 KB	-rw-r--r--	2024-03-10 20:38
mmzone.h	64.68 KB	-rw-r--r--	2026-07-01 19:48
mnt_idmapping.h	6.84 KB	-rw-r--r--	2024-03-10 20:38
mnt_namespace.h	627 B	-rw-r--r--	2024-03-10 20:38
mod_devicetable.h	25.17 KB	-rw-r--r--	2026-07-01 19:48
module.h	27.24 KB	-rw-r--r--	2026-07-01 19:48
module_signature.h	1.22 KB	-rw-r--r--	2024-03-10 20:38
module_symbol.h	409 B	-rw-r--r--	2024-03-10 20:38
moduleloader.h	4.21 KB	-rw-r--r--	2026-07-01 19:48
moduleparam.h	22.4 KB	-rw-r--r--	2026-07-01 19:48
most.h	12.2 KB	-rw-r--r--	2024-03-10 20:38
mount.h	4.29 KB	-rw-r--r--	2026-07-01 19:48
moxtet.h	2.33 KB	-rw-r--r--	2024-03-10 20:38
mpage.h	644 B	-rw-r--r--	2024-03-10 20:38
mpi.h	8.41 KB	-rw-r--r--	2024-03-10 20:38
mpls.h	394 B	-rw-r--r--	2024-03-10 20:38
mpls_iptunnel.h	178 B	-rw-r--r--	2024-03-10 20:38
mroute.h	2.12 KB	-rw-r--r--	2024-03-10 20:38
mroute6.h	2.93 KB	-rw-r--r--	2024-03-10 20:38
mroute_base.h	12.34 KB	-rw-r--r--	2026-07-01 19:48
msdos_fs.h	273 B	-rw-r--r--	2024-03-10 20:38
msdos_partition.h	1.62 KB	-rw-r--r--	2024-03-10 20:38
msg.h	395 B	-rw-r--r--	2024-03-10 20:38
msi.h	22.87 KB	-rw-r--r--	2026-07-01 19:48
msi_api.h	1.96 KB	-rw-r--r--	2024-03-10 20:38
mtio.h	1.29 KB	-rw-r--r--	2024-03-10 20:38
mutex.h	5.71 KB	-rw-r--r--	2026-07-01 19:48
mutex_api.h	25 B	-rw-r--r--	2024-03-10 20:38
mutex_types.h	2.09 KB	-rw-r--r--	2024-03-10 20:38
mv643xx.h	51.05 KB	-rw-r--r--	2024-03-10 20:38
mv643xx_eth.h	2 KB	-rw-r--r--	2024-03-10 20:38
mv643xx_i2c.h	335 B	-rw-r--r--	2024-03-10 20:38
mvebu-pmsu.h	520 B	-rw-r--r--	2024-03-10 20:38
mxm-wmi.h	399 B	-rw-r--r--	2024-03-10 20:38
namei.h	5.56 KB	-rw-r--r--	2024-03-10 20:38
nd.h	6.25 KB	-rw-r--r--	2024-03-10 20:38
ndctl.h	674 B	-rw-r--r--	2024-03-10 20:38
net.h	11.97 KB	-rw-r--r--	2026-07-01 19:48
net_tstamp.h	1.89 KB	-rw-r--r--	2024-03-10 20:38
netdev_features.h	11.56 KB	-rw-r--r--	2026-07-01 19:48
netdevice.h	167.47 KB	-rw-r--r--	2026-07-01 19:48
netfilter.h	14.25 KB	-rw-r--r--	2024-03-10 20:38
netfilter_bridge.h	2.08 KB	-rw-r--r--	2024-03-10 20:38
netfilter_defs.h	242 B	-rw-r--r--	2024-03-10 20:38
netfilter_ipv4.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
netfilter_ipv6.h	5.86 KB	-rw-r--r--	2024-03-10 20:38
netfilter_netdev.h	3.96 KB	-rw-r--r--	2024-03-10 20:38
netfs.h	18.03 KB	-rw-r--r--	2024-03-10 20:38
netlink.h	10.69 KB	-rw-r--r--	2026-07-01 19:48
netpoll.h	2.48 KB	-rw-r--r--	2026-07-01 19:48
nfs.h	1.47 KB	-rw-r--r--	2026-07-01 19:48
nfs3.h	260 B	-rw-r--r--	2024-03-10 20:38
nfs4.h	23.78 KB	-rw-r--r--	2026-07-01 19:48
nfs_common.h	402 B	-rw-r--r--	2026-07-01 19:48
nfs_fs.h	19.97 KB	-rw-r--r--	2026-07-01 19:48
nfs_fs_i.h	308 B	-rw-r--r--	2024-03-10 20:38
nfs_fs_sb.h	11.1 KB	-rw-r--r--	2026-07-01 19:48
nfs_iostat.h	3.92 KB	-rw-r--r--	2024-03-10 20:38
nfs_page.h	8.7 KB	-rw-r--r--	2026-07-01 19:48
nfs_ssc.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
nfs_xdr.h	42.41 KB	-rw-r--r--	2026-07-01 19:48
nfsacl.h	1.4 KB	-rw-r--r--	2024-03-10 20:38
nitro_enclaves.h	267 B	-rw-r--r--	2024-03-10 20:38
nl802154.h	3.87 KB	-rw-r--r--	2024-03-10 20:38
nls.h	3.09 KB	-rw-r--r--	2024-03-10 20:38
nmi.h	7.48 KB	-rw-r--r--	2026-07-01 19:48
node.h	4.7 KB	-rw-r--r--	2026-07-01 19:48
nodemask.h	17.51 KB	-rw-r--r--	2024-03-10 20:38
nodemask_types.h	263 B	-rw-r--r--	2024-03-10 20:38
nospec.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
notifier.h	8.24 KB	-rw-r--r--	2024-03-10 20:38
ns_common.h	283 B	-rw-r--r--	2024-03-10 20:38
nsc_gpio.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
nsproxy.h	3.15 KB	-rw-r--r--	2024-03-10 20:38
ntb.h	52.43 KB	-rw-r--r--	2024-03-10 20:38
ntb_transport.h	3.8 KB	-rw-r--r--	2024-03-10 20:38
nubus.h	5.54 KB	-rw-r--r--	2024-03-10 20:38
numa.h	1.38 KB	-rw-r--r--	2026-07-01 19:48
nvme-auth.h	1.44 KB	-rw-r--r--	2024-03-10 20:38
nvme-fc-driver.h	46.6 KB	-rw-r--r--	2024-03-10 20:38
nvme-fc.h	9.72 KB	-rw-r--r--	2024-03-10 20:38
nvme-keyring.h	732 B	-rw-r--r--	2026-07-01 19:48
nvme-rdma.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
nvme-tcp.h	4.67 KB	-rw-r--r--	2026-07-01 19:48
nvme.h	45.98 KB	-rw-r--r--	2026-07-01 19:48
nvmem-consumer.h	6.87 KB	-rw-r--r--	2024-03-10 20:38
nvmem-provider.h	7.86 KB	-rw-r--r--	2024-03-10 20:38
nvram.h	3.47 KB	-rw-r--r--	2024-03-10 20:38
objagg.h	1.94 KB	-rw-r--r--	2026-07-01 19:48
objpool.h	6.91 KB	-rw-r--r--	2024-03-10 20:38
objtool.h	4.88 KB	-rw-r--r--	2024-03-10 20:38
objtool_types.h	1.8 KB	-rw-r--r--	2024-03-10 20:38
of.h	49.31 KB	-rw-r--r--	2026-07-01 19:48
of_address.h	5.46 KB	-rw-r--r--	2024-03-10 20:38
of_clk.h	819 B	-rw-r--r--	2024-03-10 20:38
of_device.h	2.23 KB	-rw-r--r--	2024-03-10 20:38
of_dma.h	2.3 KB	-rw-r--r--	2024-03-10 20:38
of_fdt.h	3.48 KB	-rw-r--r--	2026-07-01 19:48
of_gpio.h	878 B	-rw-r--r--	2024-03-10 20:38
of_graph.h	3.55 KB	-rw-r--r--	2024-03-10 20:38
of_iommu.h	671 B	-rw-r--r--	2024-03-10 20:38
of_irq.h	3.82 KB	-rw-r--r--	2024-03-10 20:38
of_mdio.h	3.91 KB	-rw-r--r--	2024-03-10 20:38
of_net.h	1.15 KB	-rw-r--r--	2024-03-10 20:38
of_pci.h	915 B	-rw-r--r--	2024-03-10 20:38
of_pdt.h	1.14 KB	-rw-r--r--	2024-03-10 20:38
of_platform.h	4.14 KB	-rw-r--r--	2024-03-10 20:38
of_reserved_mem.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
oid_registry.h	5.99 KB	-rw-r--r--	2026-07-01 19:48
olpc-ec.h	2 KB	-rw-r--r--	2024-03-10 20:38
omap-dma.h	9.54 KB	-rw-r--r--	2024-03-10 20:38
omap-gpmc.h	2.64 KB	-rw-r--r--	2024-03-10 20:38
omap-iommu.h	880 B	-rw-r--r--	2024-03-10 20:38
omap-mailbox.h	689 B	-rw-r--r--	2024-03-10 20:38
omapfb.h	576 B	-rw-r--r--	2024-03-10 20:38
once.h	2.66 KB	-rw-r--r--	2026-07-01 19:48
once_lite.h	926 B	-rw-r--r--	2026-07-01 19:48
oom.h	2.85 KB	-rw-r--r--	2024-03-10 20:38
openvswitch.h	403 B	-rw-r--r--	2024-03-10 20:38
osq_lock.h	912 B	-rw-r--r--	2024-03-10 20:38
overflow.h	12.82 KB	-rw-r--r--	2026-07-01 19:48
packing.h	1.87 KB	-rw-r--r--	2026-07-01 19:48
padata.h	5.98 KB	-rw-r--r--	2026-07-01 19:48
page-flags-layout.h	3.49 KB	-rw-r--r--	2024-03-10 20:38
page-flags.h	37.74 KB	-rw-r--r--	2026-07-01 19:48
page-isolation.h	1.24 KB	-rw-r--r--	2024-03-10 20:38
page_counter.h	2.41 KB	-rw-r--r--	2024-03-10 20:38
page_ext.h	2.91 KB	-rw-r--r--	2024-03-10 20:38
page_idle.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
page_owner.h	2.32 KB	-rw-r--r--	2024-03-10 20:38
page_ref.h	7.54 KB	-rw-r--r--	2026-07-01 19:48
page_reporting.h	895 B	-rw-r--r--	2024-03-10 20:38
page_table_check.h	3.74 KB	-rw-r--r--	2024-03-10 20:38
pageblock-flags.h	2.67 KB	-rw-r--r--	2026-07-01 19:48
pagemap.h	48.04 KB	-rw-r--r--	2026-07-01 19:48
pagevec.h	2.18 KB	-rw-r--r--	2024-03-10 20:38
pagewalk.h	5.17 KB	-rw-r--r--	2024-03-10 20:38
panic.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
panic_notifier.h	296 B	-rw-r--r--	2024-03-10 20:38
parman.h	2.87 KB	-rw-r--r--	2024-03-10 20:38
parport.h	19.02 KB	-rw-r--r--	2024-03-10 20:38
parport_pc.h	6.62 KB	-rw-r--r--	2024-03-10 20:38
parser.h	1.17 KB	-rw-r--r--	2024-03-10 20:38
part_stat.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
pata_arasan_cf_data.h	1.22 KB	-rw-r--r--	2024-03-10 20:38
patchkey.h	757 B	-rw-r--r--	2024-03-10 20:38
path.h	854 B	-rw-r--r--	2026-07-01 19:48
pch_dma.h	408 B	-rw-r--r--	2024-03-10 20:38
pci-acpi.h	4.18 KB	-rw-r--r--	2024-03-10 20:38
pci-ats.h	1.88 KB	-rw-r--r--	2026-07-01 19:48
pci-doe.h	576 B	-rw-r--r--	2024-03-10 20:38
pci-ecam.h	3.28 KB	-rw-r--r--	2024-03-10 20:38
pci-ep-cfs.h	956 B	-rw-r--r--	2024-03-10 20:38
pci-epc.h	10.83 KB	-rw-r--r--	2026-07-01 19:48
pci-epf.h	7.5 KB	-rw-r--r--	2024-03-10 20:38
pci-p2pdma.h	3.01 KB	-rw-r--r--	2024-03-10 20:38
pci.h	99.25 KB	-rw-r--r--	2026-07-01 19:48
pci_hotplug.h	4.35 KB	-rw-r--r--	2024-03-10 20:38
pci_ids.h	125.49 KB	-rw-r--r--	2026-07-01 19:48
pcs-lynx.h	442 B	-rw-r--r--	2024-03-10 20:38
pcs-rzn1-miic.h	385 B	-rw-r--r--	2024-03-10 20:38
pe.h	16.73 KB	-rw-r--r--	2024-03-10 20:38
peci-cpu.h	1.5 KB	-rw-r--r--	2024-03-10 20:38
peci.h	3.17 KB	-rw-r--r--	2024-03-10 20:38
percpu-defs.h	17.22 KB	-rw-r--r--	2024-03-10 20:38
percpu-refcount.h	11.22 KB	-rw-r--r--	2024-03-10 20:38
percpu-rwsem.h	4.33 KB	-rw-r--r--	2024-03-10 20:38
percpu.h	4.72 KB	-rw-r--r--	2024-03-10 20:38
percpu_counter.h	6.81 KB	-rw-r--r--	2024-03-10 20:38
perf_event.h	55.52 KB	-rw-r--r--	2026-07-01 19:48
perf_event_api.h	30 B	-rw-r--r--	2024-03-10 20:38
perf_regs.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
personality.h	393 B	-rw-r--r--	2024-03-10 20:38
pfn.h	666 B	-rw-r--r--	2024-03-10 20:38
pfn_t.h	3.21 KB	-rw-r--r--	2024-03-10 20:38
pgalloc.h	948 B	-rw-r--r--	2026-07-01 19:48
pgtable.h	46.17 KB	-rw-r--r--	2026-07-01 19:48
pgtable_api.h	27 B	-rw-r--r--	2024-03-10 20:38
phonet.h	537 B	-rw-r--r--	2024-03-10 20:38
phy.h	71.52 KB	-rw-r--r--	2026-07-01 19:48
phy_fixed.h	1.82 KB	-rw-r--r--	2024-03-10 20:38
phy_led_triggers.h	1.01 KB	-rw-r--r--	2024-03-10 20:38
phylib_stubs.h	1.5 KB	-rw-r--r--	2024-03-10 20:38
phylink.h	24.63 KB	-rw-r--r--	2024-03-10 20:38
pid.h	9.38 KB	-rw-r--r--	2024-03-10 20:38
pid_namespace.h	3.07 KB	-rw-r--r--	2024-03-10 20:38
pid_types.h	282 B	-rw-r--r--	2024-03-10 20:38
pim.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
pipe_fs_i.h	9.06 KB	-rw-r--r--	2024-03-10 20:38
pkeys.h	990 B	-rw-r--r--	2024-03-10 20:38
pktcdvd.h	5.72 KB	-rw-r--r--	2024-03-10 20:38
pl320-ipc.h	209 B	-rw-r--r--	2024-03-10 20:38
platform_device.h	13.42 KB	-rw-r--r--	2026-07-01 19:48
platform_profile.h	1.16 KB	-rw-r--r--	2026-07-01 19:48
pldmfw.h	4.76 KB	-rw-r--r--	2024-03-10 20:38
plist.h	8.58 KB	-rw-r--r--	2024-03-10 20:38
plist_types.h	315 B	-rw-r--r--	2024-03-10 20:38
pm-trace.h	940 B	-rw-r--r--	2024-03-10 20:38
pm.h	36.78 KB	-rw-r--r--	2024-03-10 20:38
pm_clock.h	2.59 KB	-rw-r--r--	2024-03-10 20:38
pm_domain.h	14.05 KB	-rw-r--r--	2026-07-01 19:48
pm_opp.h	18.38 KB	-rw-r--r--	2024-03-10 20:38
pm_qos.h	10.41 KB	-rw-r--r--	2024-03-10 20:38
pm_runtime.h	20.05 KB	-rw-r--r--	2026-07-01 19:48
pm_wakeirq.h	863 B	-rw-r--r--	2024-03-10 20:38
pm_wakeup.h	7.02 KB	-rw-r--r--	2024-03-10 20:38
pmbus.h	2.48 KB	-rw-r--r--	2024-03-10 20:38
pmu.h	2.45 KB	-rw-r--r--	2024-03-10 20:38
pnp.h	14.86 KB	-rw-r--r--	2026-07-01 19:48
poison.h	2.98 KB	-rw-r--r--	2024-03-10 20:38
poll.h	4.19 KB	-rw-r--r--	2026-07-01 19:48
polynomial.h	814 B	-rw-r--r--	2024-03-10 20:38
posix-clock.h	4.7 KB	-rw-r--r--	2026-07-01 19:48
posix-timers.h	5.35 KB	-rw-r--r--	2024-03-10 20:38
posix-timers_types.h	2.21 KB	-rw-r--r--	2024-03-10 20:38
posix_acl.h	4.28 KB	-rw-r--r--	2024-03-10 20:38
posix_acl_xattr.h	1.95 KB	-rw-r--r--	2024-03-10 20:38
power_supply.h	40.07 KB	-rw-r--r--	2024-03-10 20:38
powercap.h	11.98 KB	-rw-r--r--	2024-03-10 20:38
ppp-comp.h	2.97 KB	-rw-r--r--	2024-03-10 20:38
ppp_channel.h	3.04 KB	-rw-r--r--	2024-03-10 20:38
ppp_defs.h	1.12 KB	-rw-r--r--	2026-07-01 19:48
pps_kernel.h	2.94 KB	-rw-r--r--	2026-07-01 19:48
pr.h	1.33 KB	-rw-r--r--	2024-03-10 20:38
prandom.h	1.28 KB	-rw-r--r--	2024-03-10 20:38
preempt.h	15.75 KB	-rw-r--r--	2026-07-01 19:48
prefetch.h	1.55 KB	-rw-r--r--	2024-03-10 20:38
prime_numbers.h	1.35 KB	-rw-r--r--	2024-03-10 20:38
printk.h	23.3 KB	-rw-r--r--	2026-07-01 19:48
prmt.h	143 B	-rw-r--r--	2024-03-10 20:38
proc_fs.h	9.13 KB	-rw-r--r--	2026-07-01 19:48
proc_ns.h	2.52 KB	-rw-r--r--	2024-03-10 20:38
processor.h	1.84 KB	-rw-r--r--	2024-03-10 20:38
profile.h	1.5 KB	-rw-r--r--	2026-07-01 19:48
projid.h	2.22 KB	-rw-r--r--	2024-03-10 20:38
property.h	19.95 KB	-rw-r--r--	2026-07-01 19:48
pruss_driver.h	4.44 KB	-rw-r--r--	2026-07-01 19:48
psci.h	1.52 KB	-rw-r--r--	2024-03-10 20:38
pseudo_fs.h	362 B	-rw-r--r--	2024-03-10 20:38
psi.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
psi_types.h	4.94 KB	-rw-r--r--	2026-07-01 19:48
psp-platform-access.h	1.83 KB	-rw-r--r--	2024-03-10 20:38
psp-sev.h	18.33 KB	-rw-r--r--	2024-03-10 20:38
psp-tee.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
psp.h	771 B	-rw-r--r--	2026-07-01 19:48
pstore.h	7.76 KB	-rw-r--r--	2024-03-10 20:38
pstore_blk.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
pstore_ram.h	883 B	-rw-r--r--	2024-03-10 20:38
pstore_zone.h	2.28 KB	-rw-r--r--	2024-03-10 20:38
ptdump.h	567 B	-rw-r--r--	2024-03-10 20:38
pti.h	240 B	-rw-r--r--	2024-03-10 20:38
ptp_classify.h	6.88 KB	-rw-r--r--	2024-03-10 20:38
ptp_clock_kernel.h	15.59 KB	-rw-r--r--	2024-03-10 20:38
ptp_kvm.h	486 B	-rw-r--r--	2024-03-10 20:38
ptp_mock.h	670 B	-rw-r--r--	2024-03-10 20:38
ptp_pch.h	666 B	-rw-r--r--	2024-03-10 20:38
ptr_ring.h	16.23 KB	-rw-r--r--	2026-07-01 19:48
ptrace.h	16.79 KB	-rw-r--r--	2024-03-10 20:38
ptrace_api.h	26 B	-rw-r--r--	2024-03-10 20:38
purgatory.h	590 B	-rw-r--r--	2024-03-10 20:38
pvclock_gtod.h	548 B	-rw-r--r--	2024-03-10 20:38
pwm.h	15.65 KB	-rw-r--r--	2026-07-01 19:48
pwm_backlight.h	709 B	-rw-r--r--	2024-03-10 20:38
pxa168_eth.h	728 B	-rw-r--r--	2024-03-10 20:38
pxa2xx_ssp.h	11.13 KB	-rw-r--r--	2024-03-10 20:38
qnx6_fs.h	3.27 KB	-rw-r--r--	2024-03-10 20:38
quota.h	18.76 KB	-rw-r--r--	2026-07-01 19:48
quotaops.h	10.05 KB	-rw-r--r--	2026-07-01 19:48
radix-tree.h	15.95 KB	-rw-r--r--	2024-03-10 20:38
raid_class.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
ramfs.h	746 B	-rw-r--r--	2024-03-10 20:38
random.h	5.14 KB	-rw-r--r--	2024-03-10 20:38
randomize_kstack.h	3.83 KB	-rw-r--r--	2026-07-01 19:48
range.h	743 B	-rw-r--r--	2024-03-10 20:38
ras.h	1.39 KB	-rw-r--r--	2026-07-01 19:48
ratelimit.h	1.72 KB	-rw-r--r--	2024-03-10 20:38
ratelimit_types.h	1.33 KB	-rw-r--r--	2024-03-10 20:38
rational.h	639 B	-rw-r--r--	2024-03-10 20:38
rbtree.h	8.94 KB	-rw-r--r--	2024-03-10 20:38
rbtree_augmented.h	10.18 KB	-rw-r--r--	2024-03-10 20:38
rbtree_latch.h	6.66 KB	-rw-r--r--	2024-03-10 20:38
rbtree_types.h	946 B	-rw-r--r--	2024-03-10 20:38
rcu_node_tree.h	3.73 KB	-rw-r--r--	2024-03-10 20:38
rcu_notifier.h	1.09 KB	-rw-r--r--	2024-03-10 20:38
rcu_segcblist.h	11.72 KB	-rw-r--r--	2024-03-10 20:38
rcu_sync.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
rculist.h	28.56 KB	-rw-r--r--	2024-03-10 20:38
rculist_bl.h	3.29 KB	-rw-r--r--	2024-03-10 20:38
rculist_nulls.h	8.71 KB	-rw-r--r--	2026-07-01 19:48
rcupdate.h	39.69 KB	-rw-r--r--	2026-07-01 19:48
rcupdate_trace.h	3.16 KB	-rw-r--r--	2024-03-10 20:38
rcupdate_wait.h	2.16 KB	-rw-r--r--	2024-03-10 20:38
rcuref.h	4.66 KB	-rw-r--r--	2026-07-01 19:48
rcutiny.h	4.62 KB	-rw-r--r--	2026-07-01 19:48
rcutree.h	4.38 KB	-rw-r--r--	2026-07-01 19:48
rcuwait.h	2.32 KB	-rw-r--r--	2024-03-10 20:38
rcuwait_api.h	27 B	-rw-r--r--	2024-03-10 20:38
reboot-mode.h	600 B	-rw-r--r--	2024-03-10 20:38
reboot.h	4.95 KB	-rw-r--r--	2024-03-10 20:38
reciprocal_div.h	3.28 KB	-rw-r--r--	2024-03-10 20:38
ref_tracker.h	2.35 KB	-rw-r--r--	2024-03-10 20:38
refcount.h	11.78 KB	-rw-r--r--	2024-03-10 20:38
refcount_api.h	28 B	-rw-r--r--	2024-03-10 20:38
refcount_types.h	512 B	-rw-r--r--	2024-03-10 20:38
regmap.h	69.16 KB	-rw-r--r--	2026-07-01 19:48
regset.h	11.35 KB	-rw-r--r--	2024-03-10 20:38
relay.h	8.47 KB	-rw-r--r--	2024-03-10 20:38
remoteproc.h	25.08 KB	-rw-r--r--	2024-03-10 20:38
resctrl.h	8.69 KB	-rw-r--r--	2024-03-10 20:38
reset-controller.h	3.57 KB	-rw-r--r--	2024-03-10 20:38
reset.h	30.96 KB	-rw-r--r--	2026-07-01 19:48
resource.h	223 B	-rw-r--r--	2024-03-10 20:38
resource_ext.h	2.08 KB	-rw-r--r--	2024-03-10 20:38
restart_block.h	1.11 KB	-rw-r--r--	2024-03-10 20:38
resume_user_mode.h	1.88 KB	-rw-r--r--	2024-03-10 20:38
rethook.h	3.15 KB	-rw-r--r--	2024-03-10 20:38
rfkill.h	10.75 KB	-rw-r--r--	2024-03-10 20:38
rhashtable-types.h	3.46 KB	-rw-r--r--	2024-03-10 20:38
rhashtable.h	37.92 KB	-rw-r--r--	2024-03-10 20:38
ring_buffer.h	7.93 KB	-rw-r--r--	2026-07-01 19:48
rio.h	19.02 KB	-rw-r--r--	2024-03-10 20:38
rio_drv.h	14.32 KB	-rw-r--r--	2024-03-10 20:38
rio_ids.h	723 B	-rw-r--r--	2024-03-10 20:38
rio_regs.h	19.07 KB	-rw-r--r--	2024-03-10 20:38
rmap.h	24.05 KB	-rw-r--r--	2024-03-10 20:38
rmi.h	12.04 KB	-rw-r--r--	2024-03-10 20:38
rndis.h	16.86 KB	-rw-r--r--	2024-03-10 20:38
rodata_test.h	394 B	-rw-r--r--	2024-03-10 20:38
root_dev.h	361 B	-rw-r--r--	2024-03-10 20:38
rpmsg.h	9.46 KB	-rw-r--r--	2024-03-10 20:38
rseq.h	3.08 KB	-rw-r--r--	2026-07-01 19:48
rslib.h	3.64 KB	-rw-r--r--	2024-03-10 20:38
rtc.h	9.25 KB	-rw-r--r--	2024-03-10 20:38
rtmutex.h	3.38 KB	-rw-r--r--	2024-03-10 20:38
rtnetlink.h	5.5 KB	-rw-r--r--	2024-03-10 20:38
rtsx_common.h	890 B	-rw-r--r--	2024-03-10 20:38
rtsx_pci.h	40.09 KB	-rw-r--r--	2024-03-10 20:38
rtsx_usb.h	15.38 KB	-rw-r--r--	2024-03-10 20:38
rv.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
rwbase_rt.h	1020 B	-rw-r--r--	2026-07-01 19:48
rwlock.h	4.15 KB	-rw-r--r--	2024-03-10 20:38
rwlock_api_smp.h	7.85 KB	-rw-r--r--	2024-03-10 20:38
rwlock_rt.h	3.29 KB	-rw-r--r--	2024-03-10 20:38
rwlock_types.h	1.77 KB	-rw-r--r--	2024-03-10 20:38
rwsem.h	8.57 KB	-rw-r--r--	2026-07-01 19:48
sbitmap.h	17.81 KB	-rw-r--r--	2026-07-01 19:48
scatterlist.h	21.17 KB	-rw-r--r--	2026-07-01 19:48
scc.h	2.84 KB	-rw-r--r--	2024-03-10 20:38
sched.h	61.03 KB	-rw-r--r--	2026-07-01 19:48
sched_clock.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
scmi_protocol.h	35 KB	-rw-r--r--	2024-03-10 20:38
scpi_protocol.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
screen_info.h	3.35 KB	-rw-r--r--	2026-07-01 19:48
scs.h	2.25 KB	-rw-r--r--	2024-03-10 20:38
sctp.h	23.09 KB	-rw-r--r--	2024-03-10 20:38
scx200.h	1.82 KB	-rw-r--r--	2024-03-10 20:38
scx200_gpio.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
seccomp.h	2.99 KB	-rw-r--r--	2026-07-01 19:48
seccomp_types.h	834 B	-rw-r--r--	2024-03-10 20:38
secretmem.h	706 B	-rw-r--r--	2026-07-01 19:48
securebits.h	239 B	-rw-r--r--	2024-03-10 20:38
security.h	61.1 KB	-rw-r--r--	2026-07-01 19:48
sed-opal-key.h	614 B	-rw-r--r--	2024-03-10 20:38
sed-opal.h	1.92 KB	-rw-r--r--	2024-03-10 20:38
seg6.h	121 B	-rw-r--r--	2024-03-10 20:38
seg6_genl.h	136 B	-rw-r--r--	2024-03-10 20:38
seg6_hmac.h	136 B	-rw-r--r--	2024-03-10 20:38
seg6_iptunnel.h	148 B	-rw-r--r--	2024-03-10 20:38
seg6_local.h	100 B	-rw-r--r--	2024-03-10 20:38
selection.h	1.81 KB	-rw-r--r--	2026-07-01 19:48
sem.h	515 B	-rw-r--r--	2024-03-10 20:38
sem_types.h	234 B	-rw-r--r--	2024-03-10 20:38
semaphore.h	1.58 KB	-rw-r--r--	2024-03-10 20:38
seq_buf.h	4.24 KB	-rw-r--r--	2024-03-10 20:38
seq_file.h	9.99 KB	-rw-r--r--	2024-03-10 20:38
seq_file_net.h	787 B	-rw-r--r--	2024-03-10 20:38
seqlock.h	36.77 KB	-rw-r--r--	2026-07-01 19:48
seqlock_api.h	27 B	-rw-r--r--	2024-03-10 20:38
seqlock_types.h	3.11 KB	-rw-r--r--	2024-03-10 20:38
serdev.h	10.12 KB	-rw-r--r--	2024-03-10 20:38
serial.h	1.03 KB	-rw-r--r--	2024-03-10 20:38
serial_8250.h	7.21 KB	-rw-r--r--	2024-03-10 20:38
serial_bcm63xx.h	4.73 KB	-rw-r--r--	2024-03-10 20:38
serial_core.h	36.91 KB	-rw-r--r--	2026-07-01 19:48
serial_max3100.h	1.19 KB	-rw-r--r--	2024-03-10 20:38
serial_s3c.h	9.32 KB	-rw-r--r--	2024-03-10 20:38
serial_sci.h	1.6 KB	-rw-r--r--	2024-03-10 20:38
serio.h	4.39 KB	-rw-r--r--	2026-07-01 19:48
set_memory.h	1.9 KB	-rw-r--r--	2024-03-10 20:38
sfp.h	16.93 KB	-rw-r--r--	2026-07-01 19:48
sh_clk.h	5.96 KB	-rw-r--r--	2024-03-10 20:38
sh_dma.h	3.47 KB	-rw-r--r--	2024-03-10 20:38
sh_eth.h	369 B	-rw-r--r--	2024-03-10 20:38
sh_intc.h	3.63 KB	-rw-r--r--	2024-03-10 20:38
sh_timer.h	172 B	-rw-r--r--	2024-03-10 20:38
shdma-base.h	4.27 KB	-rw-r--r--	2026-07-01 19:48
shm.h	961 B	-rw-r--r--	2024-03-10 20:38
shmem_fs.h	7.65 KB	-rw-r--r--	2026-07-01 19:48
shrinker.h	4.87 KB	-rw-r--r--	2024-03-10 20:38
signal.h	13.79 KB	-rw-r--r--	2024-03-10 20:38
signal_types.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
signalfd.h	817 B	-rw-r--r--	2024-03-10 20:38
siox.h	2.26 KB	-rw-r--r--	2024-03-10 20:38
siphash.h	5.66 KB	-rw-r--r--	2024-03-10 20:38
sizes.h	1.68 KB	-rw-r--r--	2024-03-10 20:38
skb_array.h	5.22 KB	-rw-r--r--	2026-07-01 19:48
skbuff.h	145.75 KB	-rw-r--r--	2026-07-01 19:48
skmsg.h	15.4 KB	-rw-r--r--	2026-07-01 19:48
slab.h	24.79 KB	-rw-r--r--	2026-07-01 19:48
slimbus.h	6.93 KB	-rw-r--r--	2024-03-10 20:38
sm501-regs.h	11.62 KB	-rw-r--r--	2024-03-10 20:38
sm501.h	4.02 KB	-rw-r--r--	2024-03-10 20:38
smc91x.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
smp.h	7.93 KB	-rw-r--r--	2026-07-01 19:48
smp_types.h	1.35 KB	-rw-r--r--	2024-03-10 20:38
smpboot.h	1.68 KB	-rw-r--r--	2024-03-10 20:38
smsc911x.h	1.63 KB	-rw-r--r--	2024-03-10 20:38
smscphy.h	3.1 KB	-rw-r--r--	2024-03-10 20:38
sock_diag.h	2.42 KB	-rw-r--r--	2026-07-01 19:48
socket.h	15.49 KB	-rw-r--r--	2024-03-10 20:38
sockptr.h	3.8 KB	-rw-r--r--	2026-07-01 19:48
softirq.h	29 B	-rw-r--r--	2024-03-10 20:38
sonet.h	469 B	-rw-r--r--	2024-03-10 20:38
sony-laptop.h	1.41 KB	-rw-r--r--	2024-03-10 20:38
sonypi.h	1.71 KB	-rw-r--r--	2024-03-10 20:38
sort.h	348 B	-rw-r--r--	2024-03-10 20:38
sound.h	685 B	-rw-r--r--	2024-03-10 20:38
soundcard.h	1.59 KB	-rw-r--r--	2024-03-10 20:38
spinlock.h	17.55 KB	-rw-r--r--	2026-07-01 19:48
spinlock_api.h	28 B	-rw-r--r--	2024-03-10 20:38
spinlock_api_smp.h	5.23 KB	-rw-r--r--	2024-03-10 20:38
spinlock_api_up.h	3.38 KB	-rw-r--r--	2024-03-10 20:38
spinlock_rt.h	4.12 KB	-rw-r--r--	2024-03-10 20:38
spinlock_types.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
spinlock_types_raw.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
spinlock_types_up.h	730 B	-rw-r--r--	2024-03-10 20:38
spinlock_up.h	2.08 KB	-rw-r--r--	2026-07-01 19:48
splice.h	3.72 KB	-rw-r--r--	2024-03-10 20:38
spmi.h	5.85 KB	-rw-r--r--	2024-03-10 20:38
sprintf.h	1.24 KB	-rw-r--r--	2026-07-01 19:48
sram.h	437 B	-rw-r--r--	2024-03-10 20:38
srcu.h	11.26 KB	-rw-r--r--	2024-03-10 20:38
srcutiny.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
srcutree.h	7.67 KB	-rw-r--r--	2024-03-10 20:38
ssbi.h	726 B	-rw-r--r--	2024-03-10 20:38
stackdepot.h	8.65 KB	-rw-r--r--	2026-07-01 19:48
stackleak.h	2.36 KB	-rw-r--r--	2024-03-10 20:38
stackprotector.h	859 B	-rw-r--r--	2024-03-10 20:38
stacktrace.h	4 KB	-rw-r--r--	2024-03-10 20:38
start_kernel.h	448 B	-rw-r--r--	2024-03-10 20:38
stat.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
statfs.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
static_call.h	10.66 KB	-rw-r--r--	2026-07-01 19:48
static_call_types.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
static_key.h	30 B	-rw-r--r--	2024-03-10 20:38
stdarg.h	313 B	-rw-r--r--	2024-03-10 20:38
stddef.h	3.17 KB	-rw-r--r--	2024-03-10 20:38
stm.h	4.34 KB	-rw-r--r--	2024-03-10 20:38
stmmac.h	8.35 KB	-rw-r--r--	2026-07-01 19:48
stmp3xxx_rtc_wdt.h	331 B	-rw-r--r--	2024-03-10 20:38
stmp_device.h	412 B	-rw-r--r--	2024-03-10 20:38
stop_machine.h	4.93 KB	-rw-r--r--	2024-03-10 20:38
string.h	12.24 KB	-rw-r--r--	2024-03-10 20:38
string_choices.h	979 B	-rw-r--r--	2026-07-01 19:48
string_helpers.h	3.17 KB	-rw-r--r--	2024-03-10 20:38
stringhash.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
stringify.h	395 B	-rw-r--r--	2024-03-10 20:38
sungem_phy.h	3.96 KB	-rw-r--r--	2024-03-10 20:38
sunserialcore.h	1.08 KB	-rw-r--r--	2024-03-10 20:38
sunxi-rsb.h	2.89 KB	-rw-r--r--	2024-03-10 20:38
surface_acpi_notify.h	1.07 KB	-rw-r--r--	2024-03-10 20:38
suspend.h	21.74 KB	-rw-r--r--	2024-03-10 20:38
svga.h	3.75 KB	-rw-r--r--	2024-03-10 20:38
sw842.h	328 B	-rw-r--r--	2024-03-10 20:38
swab.h	912 B	-rw-r--r--	2024-03-10 20:38
swait.h	9.47 KB	-rw-r--r--	2024-03-10 20:38
swait_api.h	25 B	-rw-r--r--	2024-03-10 20:38
swap.h	21.49 KB	-rw-r--r--	2026-07-01 19:48
swap_cgroup.h	972 B	-rw-r--r--	2024-03-10 20:38
swap_slots.h	842 B	-rw-r--r--	2024-03-10 20:38
swapfile.h	450 B	-rw-r--r--	2024-03-10 20:38
swapops.h	15.55 KB	-rw-r--r--	2026-07-01 19:48
swiotlb.h	8.06 KB	-rw-r--r--	2024-03-10 20:38
switchtec.h	10.92 KB	-rw-r--r--	2024-03-10 20:38
sxgbe_platform.h	1.23 KB	-rw-r--r--	2024-03-10 20:38
sync_core.h	581 B	-rw-r--r--	2024-03-10 20:38
sync_file.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
synclink.h	989 B	-rw-r--r--	2024-03-10 20:38
sys.h	960 B	-rw-r--r--	2024-03-10 20:38
sys_soc.h	1.26 KB	-rw-r--r--	2024-03-10 20:38
syscall_user_dispatch.h	1.31 KB	-rw-r--r--	2024-03-10 20:38
syscall_user_dispatch_types.h	388 B	-rw-r--r--	2024-03-10 20:38
syscalls.h	55.59 KB	-rw-r--r--	2026-07-01 19:48
syscalls_api.h	28 B	-rw-r--r--	2024-03-10 20:38
syscore_ops.h	633 B	-rw-r--r--	2024-03-10 20:38
sysctl.h	9.6 KB	-rw-r--r--	2026-07-01 19:48
sysfb.h	2.76 KB	-rw-r--r--	2026-07-01 19:48
sysfs.h	18.23 KB	-rw-r--r--	2024-03-10 20:38
syslog.h	1.29 KB	-rw-r--r--	2024-03-10 20:38
sysrq.h	1.95 KB	-rw-r--r--	2024-03-10 20:38
sysv_fs.h	9.03 KB	-rw-r--r--	2024-03-10 20:38
t10-pi.h	2.17 KB	-rw-r--r--	2024-03-10 20:38
task_io_accounting.h	1.13 KB	-rw-r--r--	2024-03-10 20:38
task_io_accounting_ops.h	2.55 KB	-rw-r--r--	2024-03-10 20:38
task_work.h	1.1 KB	-rw-r--r--	2026-07-01 19:48
taskstats_kern.h	957 B	-rw-r--r--	2024-03-10 20:38
tboot.h	3.26 KB	-rw-r--r--	2024-03-10 20:38
tc.h	3.45 KB	-rw-r--r--	2024-03-10 20:38
tca6416_keypad.h	683 B	-rw-r--r--	2024-03-10 20:38
tcp.h	20.61 KB	-rw-r--r--	2026-07-01 19:48
tee_drv.h	15.77 KB	-rw-r--r--	2024-03-10 20:38
tegra-icc.h	1.86 KB	-rw-r--r--	2024-03-10 20:38
termios_internal.h	1.48 KB	-rw-r--r--	2024-03-10 20:38
textsearch.h	4.75 KB	-rw-r--r--	2026-07-01 19:48
textsearch_fsm.h	1.19 KB	-rw-r--r--	2024-03-10 20:38
tfrc.h	1.68 KB	-rw-r--r--	2024-03-10 20:38
thermal.h	15.81 KB	-rw-r--r--	2026-07-01 19:48
thread_info.h	7.47 KB	-rw-r--r--	2024-03-10 20:38
threads.h	1.28 KB	-rw-r--r--	2024-03-10 20:38
thunderbolt.h	21.4 KB	-rw-r--r--	2024-03-10 20:38
ti-emif-sram.h	4.75 KB	-rw-r--r--	2024-03-10 20:38
ti_wilink_st.h	13.47 KB	-rw-r--r--	2024-03-10 20:38
tick.h	9.85 KB	-rw-r--r--	2026-07-01 19:48
tifm.h	4.66 KB	-rw-r--r--	2024-03-10 20:38
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Rename

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
 */
#ifndef LINUX_DMAENGINE_H
#define LINUX_DMAENGINE_H

#include <linux/device.h>
#include <linux/err.h>
#include <linux/uio.h>
#include <linux/bug.h>
#include <linux/scatterlist.h>
#include <linux/bitmap.h>
#include <linux/types.h>
#include <asm/page.h>

/**
 * typedef dma_cookie_t - an opaque DMA cookie
 *
 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
 */
typedef s32 dma_cookie_t;
#define DMA_MIN_COOKIE	1

static inline int dma_submit_error(dma_cookie_t cookie)
{
	return cookie < 0 ? cookie : 0;
}

/**
 * enum dma_status - DMA transaction status
 * @DMA_COMPLETE: transaction completed
 * @DMA_IN_PROGRESS: transaction not yet processed
 * @DMA_PAUSED: transaction is paused
 * @DMA_ERROR: transaction failed
 */
enum dma_status {
	DMA_COMPLETE,
	DMA_IN_PROGRESS,
	DMA_PAUSED,
	DMA_ERROR,
	DMA_OUT_OF_ORDER,
};

/**
 * enum dma_transaction_type - DMA transaction types/indexes
 *
 * Note: The DMA_ASYNC_TX capability is not to be set by drivers.  It is
 * automatically set as dma devices are registered.
 */
enum dma_transaction_type {
	DMA_MEMCPY,
	DMA_XOR,
	DMA_PQ,
	DMA_XOR_VAL,
	DMA_PQ_VAL,
	DMA_MEMSET,
	DMA_MEMSET_SG,
	DMA_INTERRUPT,
	DMA_PRIVATE,
	DMA_ASYNC_TX,
	DMA_SLAVE,
	DMA_CYCLIC,
	DMA_INTERLEAVE,
	DMA_COMPLETION_NO_ORDER,
	DMA_REPEAT,
	DMA_LOAD_EOT,
/* last transaction type for creation of the capabilities mask */
	DMA_TX_TYPE_END,
};

/**
 * enum dma_transfer_direction - dma transfer mode and direction indicator
 * @DMA_MEM_TO_MEM: Async/Memcpy mode
 * @DMA_MEM_TO_DEV: Slave mode & From Memory to Device
 * @DMA_DEV_TO_MEM: Slave mode & From Device to Memory
 * @DMA_DEV_TO_DEV: Slave mode & From Device to Device
 */
enum dma_transfer_direction {
	DMA_MEM_TO_MEM,
	DMA_MEM_TO_DEV,
	DMA_DEV_TO_MEM,
	DMA_DEV_TO_DEV,
	DMA_TRANS_NONE,
};

/**
 * Interleaved Transfer Request
 * ----------------------------
 * A chunk is collection of contiguous bytes to be transferred.
 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
 * ICGs may or may not change between chunks.
 * A FRAME is the smallest series of contiguous {chunk,icg} pairs,
 *  that when repeated an integral number of times, specifies the transfer.
 * A transfer template is specification of a Frame, the number of times
 *  it is to be repeated and other per-transfer attributes.
 *
 * Practically, a client driver would have ready a template for each
 *  type of transfer it is going to need during its lifetime and
 *  set only 'src_start' and 'dst_start' before submitting the requests.
 *
 *
 *  |      Frame-1        |       Frame-2       | ~ |       Frame-'numf'  |
 *  |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...|
 *
 *    ==  Chunk size
 *    ... ICG
 */

/**
 * struct data_chunk - Element of scatter-gather list that makes a frame.
 * @size: Number of bytes to read from source.
 *	  size_dst := fn(op, size_src), so doesn't mean much for destination.
 * @icg: Number of bytes to jump after last src/dst address of this
 *	 chunk and before first src/dst address for next chunk.
 *	 Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false.
 *	 Ignored for src(assumed 0), if src_inc is true and src_sgl is false.
 * @dst_icg: Number of bytes to jump after last dst address of this
 *	 chunk and before the first dst address for next chunk.
 *	 Ignored if dst_inc is true and dst_sgl is false.
 * @src_icg: Number of bytes to jump after last src address of this
 *	 chunk and before the first src address for next chunk.
 *	 Ignored if src_inc is true and src_sgl is false.
 */
struct data_chunk {
	size_t size;
	size_t icg;
	size_t dst_icg;
	size_t src_icg;
};

/**
 * struct dma_interleaved_template - Template to convey DMAC the transfer pattern
 *	 and attributes.
 * @src_start: Bus address of source for the first chunk.
 * @dst_start: Bus address of destination for the first chunk.
 * @dir: Specifies the type of Source and Destination.
 * @src_inc: If the source address increments after reading from it.
 * @dst_inc: If the destination address increments after writing to it.
 * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
 *		Otherwise, source is read contiguously (icg ignored).
 *		Ignored if src_inc is false.
 * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
 *		Otherwise, destination is filled contiguously (icg ignored).
 *		Ignored if dst_inc is false.
 * @numf: Number of frames in this template.
 * @frame_size: Number of chunks in a frame i.e, size of sgl[].
 * @sgl: Array of {chunk,icg} pairs that make up a frame.
 */
struct dma_interleaved_template {
	dma_addr_t src_start;
	dma_addr_t dst_start;
	enum dma_transfer_direction dir;
	bool src_inc;
	bool dst_inc;
	bool src_sgl;
	bool dst_sgl;
	size_t numf;
	size_t frame_size;
	struct data_chunk sgl[];
};

/**
 * enum dma_ctrl_flags - DMA flags to augment operation preparation,
 *  control completion, and communicate status.
 * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of
 *  this transaction
 * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client
 *  acknowledges receipt, i.e. has a chance to establish any dependency
 *  chains
 * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q
 * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P
 * @DMA_PREP_CONTINUE - indicate to a driver that it is reusing buffers as
 *  sources that were the result of a previous operation, in the case of a PQ
 *  operation it continues the calculation with new sources
 * @DMA_PREP_FENCE - tell the driver that subsequent operations depend
 *  on the result of this operation
 * @DMA_CTRL_REUSE: client can reuse the descriptor and submit again till
 *  cleared or freed
 * @DMA_PREP_CMD: tell the driver that the data passed to DMA API is command
 *  data and the descriptor should be in different format from normal
 *  data descriptors.
 * @DMA_PREP_REPEAT: tell the driver that the transaction shall be automatically
 *  repeated when it ends until a transaction is issued on the same channel
 *  with the DMA_PREP_LOAD_EOT flag set. This flag is only applicable to
 *  interleaved transactions and is ignored for all other transaction types.
 * @DMA_PREP_LOAD_EOT: tell the driver that the transaction shall replace any
 *  active repeated (as indicated by DMA_PREP_REPEAT) transaction when the
 *  repeated transaction ends. Not setting this flag when the previously queued
 *  transaction is marked with DMA_PREP_REPEAT will cause the new transaction
 *  to never be processed and stay in the issued queue forever. The flag is
 *  ignored if the previous transaction is not a repeated transaction.
 */
enum dma_ctrl_flags {
	DMA_PREP_INTERRUPT = (1 << 0),
	DMA_CTRL_ACK = (1 << 1),
	DMA_PREP_PQ_DISABLE_P = (1 << 2),
	DMA_PREP_PQ_DISABLE_Q = (1 << 3),
	DMA_PREP_CONTINUE = (1 << 4),
	DMA_PREP_FENCE = (1 << 5),
	DMA_CTRL_REUSE = (1 << 6),
	DMA_PREP_CMD = (1 << 7),
	DMA_PREP_REPEAT = (1 << 8),
	DMA_PREP_LOAD_EOT = (1 << 9),
};

/**
 * enum sum_check_bits - bit position of pq_check_flags
 */
enum sum_check_bits {
	SUM_CHECK_P = 0,
	SUM_CHECK_Q = 1,
};

/**
 * enum pq_check_flags - result of async_{xor,pq}_zero_sum operations
 * @SUM_CHECK_P_RESULT - 1 if xor zero sum error, 0 otherwise
 * @SUM_CHECK_Q_RESULT - 1 if reed-solomon zero sum error, 0 otherwise
 */
enum sum_check_flags {
	SUM_CHECK_P_RESULT = (1 << SUM_CHECK_P),
	SUM_CHECK_Q_RESULT = (1 << SUM_CHECK_Q),
};

/**
 * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t.
 * See linux/cpumask.h
 */
typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;

/**
 * enum dma_desc_metadata_mode - per descriptor metadata mode types supported
 * @DESC_METADATA_CLIENT - the metadata buffer is allocated/provided by the
 *  client driver and it is attached (via the dmaengine_desc_attach_metadata()
 *  helper) to the descriptor.
 *
 * Client drivers interested to use this mode can follow:
 * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM:
 *   1. prepare the descriptor (dmaengine_prep_*)
 *	construct the metadata in the client's buffer
 *   2. use dmaengine_desc_attach_metadata() to attach the buffer to the
 *	descriptor
 *   3. submit the transfer
 * - DMA_DEV_TO_MEM:
 *   1. prepare the descriptor (dmaengine_prep_*)
 *   2. use dmaengine_desc_attach_metadata() to attach the buffer to the
 *	descriptor
 *   3. submit the transfer
 *   4. when the transfer is completed, the metadata should be available in the
 *	attached buffer
 *
 * @DESC_METADATA_ENGINE - the metadata buffer is allocated/managed by the DMA
 *  driver. The client driver can ask for the pointer, maximum size and the
 *  currently used size of the metadata and can directly update or read it.
 *  dmaengine_desc_get_metadata_ptr() and dmaengine_desc_set_metadata_len() is
 *  provided as helper functions.
 *
 *  Note: the metadata area for the descriptor is no longer valid after the
 *  transfer has been completed (valid up to the point when the completion
 *  callback returns if used).
 *
 * Client drivers interested to use this mode can follow:
 * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM:
 *   1. prepare the descriptor (dmaengine_prep_*)
 *   2. use dmaengine_desc_get_metadata_ptr() to get the pointer to the engine's
 *	metadata area
 *   3. update the metadata at the pointer
 *   4. use dmaengine_desc_set_metadata_len()  to tell the DMA engine the amount
 *	of data the client has placed into the metadata buffer
 *   5. submit the transfer
 * - DMA_DEV_TO_MEM:
 *   1. prepare the descriptor (dmaengine_prep_*)
 *   2. submit the transfer
 *   3. on transfer completion, use dmaengine_desc_get_metadata_ptr() to get the
 *	pointer to the engine's metadata area
 *   4. Read out the metadata from the pointer
 *
 * Note: the two mode is not compatible and clients must use one mode for a
 * descriptor.
 */
enum dma_desc_metadata_mode {
	DESC_METADATA_NONE = 0,
	DESC_METADATA_CLIENT = BIT(0),
	DESC_METADATA_ENGINE = BIT(1),
};

/**
 * struct dma_chan_percpu - the per-CPU part of struct dma_chan
 * @memcpy_count: transaction counter
 * @bytes_transferred: byte counter
 */
struct dma_chan_percpu {
	/* stats */
	unsigned long memcpy_count;
	unsigned long bytes_transferred;
};

/**
 * struct dma_router - DMA router structure
 * @dev: pointer to the DMA router device
 * @route_free: function to be called when the route can be disconnected
 */
struct dma_router {
	struct device *dev;
	void (*route_free)(struct device *dev, void *route_data);
};

/**
 * struct dma_chan - devices supply DMA channels, clients use them
 * @device: ptr to the dma device who supplies this channel, always !%NULL
 * @slave: ptr to the device using this channel
 * @cookie: last cookie value returned to client
 * @completed_cookie: last completed cookie for this channel
 * @chan_id: channel ID for sysfs
 * @dev: class device for sysfs
 * @name: backlink name for sysfs
 * @dbg_client_name: slave name for debugfs in format:
 *	dev_name(requester's dev):channel name, for example: "2b00000.mcasp:tx"
 * @device_node: used to add this to the device chan list
 * @local: per-cpu pointer to a struct dma_chan_percpu
 * @client_count: how many clients are using this channel
 * @table_count: number of appearances in the mem-to-mem allocation table
 * @router: pointer to the DMA router structure
 * @route_data: channel specific data for the router
 * @private: private data for certain client-channel associations
 */
struct dma_chan {
	struct dma_device *device;
	struct device *slave;
	dma_cookie_t cookie;
	dma_cookie_t completed_cookie;

/* sysfs */
	int chan_id;
	struct dma_chan_dev *dev;
	const char *name;
#ifdef CONFIG_DEBUG_FS
	char *dbg_client_name;
#endif

struct list_head device_node;
	struct dma_chan_percpu __percpu *local;
	int client_count;
	int table_count;

/* DMA router */
	struct dma_router *router;
	void *route_data;

void *private;
};

/**
 * struct dma_chan_dev - relate sysfs device node to backing channel device
 * @chan: driver channel device
 * @device: sysfs device
 * @dev_id: parent dma_device dev_id
 * @chan_dma_dev: The channel is using custom/different dma-mapping
 * compared to the parent dma_device
 */
struct dma_chan_dev {
	struct dma_chan *chan;
	struct device device;
	int dev_id;
	bool chan_dma_dev;
};

/**
 * enum dma_slave_buswidth - defines bus width of the DMA slave
 * device, source or target buses
 */
enum dma_slave_buswidth {
	DMA_SLAVE_BUSWIDTH_UNDEFINED = 0,
	DMA_SLAVE_BUSWIDTH_1_BYTE = 1,
	DMA_SLAVE_BUSWIDTH_2_BYTES = 2,
	DMA_SLAVE_BUSWIDTH_3_BYTES = 3,
	DMA_SLAVE_BUSWIDTH_4_BYTES = 4,
	DMA_SLAVE_BUSWIDTH_8_BYTES = 8,
	DMA_SLAVE_BUSWIDTH_16_BYTES = 16,
	DMA_SLAVE_BUSWIDTH_32_BYTES = 32,
	DMA_SLAVE_BUSWIDTH_64_BYTES = 64,
	DMA_SLAVE_BUSWIDTH_128_BYTES = 128,
};

/**
 * struct dma_slave_config - dma slave channel runtime config
 * @direction: whether the data shall go in or out on this slave
 * channel, right now. DMA_MEM_TO_DEV and DMA_DEV_TO_MEM are
 * legal values. DEPRECATED, drivers should use the direction argument
 * to the device_prep_slave_sg and device_prep_dma_cyclic functions or
 * the dir field in the dma_interleaved_template structure.
 * @src_addr: this is the physical address where DMA slave data
 * should be read (RX), if the source is memory this argument is
 * ignored.
 * @dst_addr: this is the physical address where DMA slave data
 * should be written (TX), if the destination is memory this argument
 * is ignored.
 * @src_addr_width: this is the width in bytes of the source (RX)
 * register where DMA data shall be read. If the source
 * is memory this may be ignored depending on architecture.
 * Legal values: 1, 2, 3, 4, 8, 16, 32, 64, 128.
 * @dst_addr_width: same as src_addr_width but for destination
 * target (TX) mutatis mutandis.
 * @src_maxburst: the maximum number of words (note: words, as in
 * units of the src_addr_width member, not bytes) that can be sent
 * in one burst to the device. Typically something like half the
 * FIFO depth on I/O peripherals so you don't overflow it. This
 * may or may not be applicable on memory sources.
 * @dst_maxburst: same as src_maxburst but for destination target
 * mutatis mutandis.
 * @src_port_window_size: The length of the register area in words the data need
 * to be accessed on the device side. It is only used for devices which is using
 * an area instead of a single register to receive the data. Typically the DMA
 * loops in this area in order to transfer the data.
 * @dst_port_window_size: same as src_port_window_size but for the destination
 * port.
 * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill
 * with 'true' if peripheral should be flow controller. Direction will be
 * selected at Runtime.
 * @peripheral_config: peripheral configuration for programming peripheral
 * for dmaengine transfer
 * @peripheral_size: peripheral configuration buffer size
 *
 * This struct is passed in as configuration data to a DMA engine
 * in order to set up a certain channel for DMA transport at runtime.
 * The DMA device/engine has to provide support for an additional
 * callback in the dma_device structure, device_config and this struct
 * will then be passed in as an argument to the function.
 *
 * The rationale for adding configuration information to this struct is as
 * follows: if it is likely that more than one DMA slave controllers in
 * the world will support the configuration option, then make it generic.
 * If not: if it is fixed so that it be sent in static from the platform
 * data, then prefer to do that.
 */
struct dma_slave_config {
	enum dma_transfer_direction direction;
	phys_addr_t src_addr;
	phys_addr_t dst_addr;
	enum dma_slave_buswidth src_addr_width;
	enum dma_slave_buswidth dst_addr_width;
	u32 src_maxburst;
	u32 dst_maxburst;
	u32 src_port_window_size;
	u32 dst_port_window_size;
	bool device_fc;
	void *peripheral_config;
	size_t peripheral_size;
};

/**
 * enum dma_residue_granularity - Granularity of the reported transfer residue
 * @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The
 *  DMA channel is only able to tell whether a descriptor has been completed or
 *  not, which means residue reporting is not supported by this channel. The
 *  residue field of the dma_tx_state field will always be 0.
 * @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully
 *  completed segment of the transfer (For cyclic transfers this is after each
 *  period). This is typically implemented by having the hardware generate an
 *  interrupt after each transferred segment and then the drivers updates the
 *  outstanding residue by the size of the segment. Another possibility is if
 *  the hardware supports scatter-gather and the segment descriptor has a field
 *  which gets set after the segment has been completed. The driver then counts
 *  the number of segments without the flag set to compute the residue.
 * @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred
 *  burst. This is typically only supported if the hardware has a progress
 *  register of some sort (E.g. a register with the current read/write address
 *  or a register with the amount of bursts/beats/bytes that have been
 *  transferred or still need to be transferred).
 */
enum dma_residue_granularity {
	DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0,
	DMA_RESIDUE_GRANULARITY_SEGMENT = 1,
	DMA_RESIDUE_GRANULARITY_BURST = 2,
};

/**
 * struct dma_slave_caps - expose capabilities of a slave channel only
 * @src_addr_widths: bit mask of src addr widths the channel supports.
 *	Width is specified in bytes, e.g. for a channel supporting
 *	a width of 4 the mask should have BIT(4) set.
 * @dst_addr_widths: bit mask of dst addr widths the channel supports
 * @directions: bit mask of slave directions the channel supports.
 *	Since the enum dma_transfer_direction is not defined as bit flag for
 *	each type, the dma controller should set BIT(<TYPE>) and same
 *	should be checked by controller as well
 * @min_burst: min burst capability per-transfer
 * @max_burst: max burst capability per-transfer
 * @max_sg_burst: max number of SG list entries executed in a single burst
 *	DMA tansaction with no software intervention for reinitialization.
 *	Zero value means unlimited number of entries.
 * @cmd_pause: true, if pause is supported (i.e. for reading residue or
 *	       for resume later)
 * @cmd_resume: true, if resume is supported
 * @cmd_terminate: true, if terminate cmd is supported
 * @residue_granularity: granularity of the reported transfer residue
 * @descriptor_reuse: if a descriptor can be reused by client and
 * resubmitted multiple times
 */
struct dma_slave_caps {
	u32 src_addr_widths;
	u32 dst_addr_widths;
	u32 directions;
	u32 min_burst;
	u32 max_burst;
	u32 max_sg_burst;
	bool cmd_pause;
	bool cmd_resume;
	bool cmd_terminate;
	enum dma_residue_granularity residue_granularity;
	bool descriptor_reuse;
};

static inline const char *dma_chan_name(struct dma_chan *chan)
{
	return dev_name(&chan->dev->device);
}

/**
 * typedef dma_filter_fn - callback filter for dma_request_channel
 * @chan: channel to be reviewed
 * @filter_param: opaque parameter passed through dma_request_channel
 *
 * When this optional parameter is specified in a call to dma_request_channel a
 * suitable channel is passed to this routine for further dispositioning before
 * being returned.  Where 'suitable' indicates a non-busy channel that
 * satisfies the given capability mask.  It returns 'true' to indicate that the
 * channel is suitable.
 */
typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);

typedef void (*dma_async_tx_callback)(void *dma_async_param);

enum dmaengine_tx_result {
	DMA_TRANS_NOERROR = 0,		/* SUCCESS */
	DMA_TRANS_READ_FAILED,		/* Source DMA read failed */
	DMA_TRANS_WRITE_FAILED,		/* Destination DMA write failed */
	DMA_TRANS_ABORTED,		/* Op never submitted / aborted */
};

struct dmaengine_result {
	enum dmaengine_tx_result result;
	u32 residue;
};

typedef void (*dma_async_tx_callback_result)(void *dma_async_param,
				const struct dmaengine_result *result);

struct dmaengine_unmap_data {
#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
	u16 map_cnt;
#else
	u8 map_cnt;
#endif
	u8 to_cnt;
	u8 from_cnt;
	u8 bidi_cnt;
	struct device *dev;
	struct kref kref;
	size_t len;
	dma_addr_t addr[];
};

struct dma_async_tx_descriptor;

struct dma_descriptor_metadata_ops {
	int (*attach)(struct dma_async_tx_descriptor *desc, void *data,
		      size_t len);

void *(*get_ptr)(struct dma_async_tx_descriptor *desc,
			 size_t *payload_len, size_t *max_len);
	int (*set_len)(struct dma_async_tx_descriptor *desc,
		       size_t payload_len);
};

/**
 * struct dma_async_tx_descriptor - async transaction descriptor
 * ---dma generic offload fields---
 * @cookie: tracking cookie for this transaction, set to -EBUSY if
 *	this tx is sitting on a dependency list
 * @flags: flags to augment operation preparation, control completion, and
 *	communicate status
 * @phys: physical address of the descriptor
 * @chan: target channel for this operation
 * @tx_submit: accept the descriptor, assign ordered cookie and mark the
 * descriptor pending. To be pushed on .issue_pending() call
 * @callback: routine to call after this operation is complete
 * @callback_param: general parameter to pass to the callback routine
 * @desc_metadata_mode: core managed metadata mode to protect mixed use of
 *	DESC_METADATA_CLIENT or DESC_METADATA_ENGINE. Otherwise
 *	DESC_METADATA_NONE
 * @metadata_ops: DMA driver provided metadata mode ops, need to be set by the
 *	DMA driver if metadata mode is supported with the descriptor
 * ---async_tx api specific fields---
 * @next: at completion submit this descriptor
 * @parent: pointer to the next level up in the dependency chain
 * @lock: protect the parent and next pointers
 */
struct dma_async_tx_descriptor {
	dma_cookie_t cookie;
	enum dma_ctrl_flags flags; /* not a 'long' to pack with cookie */
	dma_addr_t phys;
	struct dma_chan *chan;
	dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx);
	int (*desc_free)(struct dma_async_tx_descriptor *tx);
	dma_async_tx_callback callback;
	dma_async_tx_callback_result callback_result;
	void *callback_param;
	struct dmaengine_unmap_data *unmap;
	enum dma_desc_metadata_mode desc_metadata_mode;
	struct dma_descriptor_metadata_ops *metadata_ops;
#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
	struct dma_async_tx_descriptor *next;
	struct dma_async_tx_descriptor *parent;
	spinlock_t lock;
#endif
};

#ifdef CONFIG_DMA_ENGINE
static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx,
				 struct dmaengine_unmap_data *unmap)
{
	kref_get(&unmap->kref);
	tx->unmap = unmap;
}

struct dmaengine_unmap_data *
dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags);
void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap);
#else
static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx,
				 struct dmaengine_unmap_data *unmap)
{
}
static inline struct dmaengine_unmap_data *
dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
{
	return NULL;
}
static inline void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
{
}
#endif

static inline void dma_descriptor_unmap(struct dma_async_tx_descriptor *tx)
{
	if (!tx->unmap)
		return;

dmaengine_unmap_put(tx->unmap);
	tx->unmap = NULL;
}

#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
static inline void txd_lock(struct dma_async_tx_descriptor *txd)
{
}
static inline void txd_unlock(struct dma_async_tx_descriptor *txd)
{
}
static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next)
{
	BUG();
}
static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd)
{
}
static inline void txd_clear_next(struct dma_async_tx_descriptor *txd)
{
}
static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd)
{
	return NULL;
}
static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd)
{
	return NULL;
}

#else
static inline void txd_lock(struct dma_async_tx_descriptor *txd)
{
	spin_lock_bh(&txd->lock);
}
static inline void txd_unlock(struct dma_async_tx_descriptor *txd)
{
	spin_unlock_bh(&txd->lock);
}
static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next)
{
	txd->next = next;
	next->parent = txd;
}
static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd)
{
	txd->parent = NULL;
}
static inline void txd_clear_next(struct dma_async_tx_descriptor *txd)
{
	txd->next = NULL;
}
static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd)
{
	return txd->parent;
}
static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd)
{
	return txd->next;
}
#endif

/**
 * struct dma_tx_state - filled in to report the status of
 * a transfer.
 * @last: last completed DMA cookie
 * @used: last issued DMA cookie (i.e. the one in progress)
 * @residue: the remaining number of bytes left to transmit
 *	on the selected transfer for states DMA_IN_PROGRESS and
 *	DMA_PAUSED if this is implemented in the driver, else 0
 * @in_flight_bytes: amount of data in bytes cached by the DMA.
 */
struct dma_tx_state {
	dma_cookie_t last;
	dma_cookie_t used;
	u32 residue;
	u32 in_flight_bytes;
};

/**
 * enum dmaengine_alignment - defines alignment of the DMA async tx
 * buffers
 */
enum dmaengine_alignment {
	DMAENGINE_ALIGN_1_BYTE = 0,
	DMAENGINE_ALIGN_2_BYTES = 1,
	DMAENGINE_ALIGN_4_BYTES = 2,
	DMAENGINE_ALIGN_8_BYTES = 3,
	DMAENGINE_ALIGN_16_BYTES = 4,
	DMAENGINE_ALIGN_32_BYTES = 5,
	DMAENGINE_ALIGN_64_BYTES = 6,
	DMAENGINE_ALIGN_128_BYTES = 7,
	DMAENGINE_ALIGN_256_BYTES = 8,
};

/**
 * struct dma_slave_map - associates slave device and it's slave channel with
 * parameter to be used by a filter function
 * @devname: name of the device
 * @slave: slave channel name
 * @param: opaque parameter to pass to struct dma_filter.fn
 */
struct dma_slave_map {
	const char *devname;
	const char *slave;
	void *param;
};

/**
 * struct dma_filter - information for slave device/channel to filter_fn/param
 * mapping
 * @fn: filter function callback
 * @mapcnt: number of slave device/channel in the map
 * @map: array of channel to filter mapping data
 */
struct dma_filter {
	dma_filter_fn fn;
	int mapcnt;
	const struct dma_slave_map *map;
};

/**
 * struct dma_device - info on the entity supplying DMA services
 * @ref: reference is taken and put every time a channel is allocated or freed
 * @chancnt: how many DMA channels are supported
 * @privatecnt: how many DMA channels are requested by dma_request_channel
 * @channels: the list of struct dma_chan
 * @global_node: list_head for global dma_device_list
 * @filter: information for device/slave to filter function/param mapping
 * @cap_mask: one or more dma_capability flags
 * @desc_metadata_modes: supported metadata modes by the DMA device
 * @max_xor: maximum number of xor sources, 0 if no capability
 * @max_pq: maximum number of PQ sources and PQ-continue capability
 * @copy_align: alignment shift for memcpy operations
 * @xor_align: alignment shift for xor operations
 * @pq_align: alignment shift for pq operations
 * @fill_align: alignment shift for memset operations
 * @dev_id: unique device ID
 * @dev: struct device reference for dma mapping api
 * @owner: owner module (automatically set based on the provided dev)
 * @chan_ida: unique channel ID
 * @src_addr_widths: bit mask of src addr widths the device supports
 *	Width is specified in bytes, e.g. for a device supporting
 *	a width of 4 the mask should have BIT(4) set.
 * @dst_addr_widths: bit mask of dst addr widths the device supports
 * @directions: bit mask of slave directions the device supports.
 *	Since the enum dma_transfer_direction is not defined as bit flag for
 *	each type, the dma controller should set BIT(<TYPE>) and same
 *	should be checked by controller as well
 * @min_burst: min burst capability per-transfer
 * @max_burst: max burst capability per-transfer
 * @max_sg_burst: max number of SG list entries executed in a single burst
 *	DMA tansaction with no software intervention for reinitialization.
 *	Zero value means unlimited number of entries.
 * @descriptor_reuse: a submitted transfer can be resubmitted after completion
 * @residue_granularity: granularity of the transfer residue reported
 *	by tx_status
 * @device_alloc_chan_resources: allocate resources and return the
 *	number of allocated descriptors
 * @device_router_config: optional callback for DMA router configuration
 * @device_free_chan_resources: release DMA channel's resources
 * @device_prep_dma_memcpy: prepares a memcpy operation
 * @device_prep_dma_xor: prepares a xor operation
 * @device_prep_dma_xor_val: prepares a xor validation operation
 * @device_prep_dma_pq: prepares a pq operation
 * @device_prep_dma_pq_val: prepares a pqzero_sum operation
 * @device_prep_dma_memset: prepares a memset operation
 * @device_prep_dma_memset_sg: prepares a memset operation over a scatter list
 * @device_prep_dma_interrupt: prepares an end of chain interrupt operation
 * @device_prep_slave_sg: prepares a slave dma operation
 * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
 *	The function takes a buffer of size buf_len. The callback function will
 *	be called after period_len bytes have been transferred.
 * @device_prep_interleaved_dma: Transfer expression in a generic way.
 * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address
 * @device_caps: May be used to override the generic DMA slave capabilities
 *	with per-channel specific ones
 * @device_config: Pushes a new configuration to a channel, return 0 or an error
 *	code
 * @device_pause: Pauses any transfer happening on a channel. Returns
 *	0 or an error code
 * @device_resume: Resumes any transfer on a channel previously
 *	paused. Returns 0 or an error code
 * @device_terminate_all: Aborts all transfers on a channel. Returns 0
 *	or an error code
 * @device_synchronize: Synchronizes the termination of a transfers to the
 *  current context.
 * @device_tx_status: poll for transaction completion, the optional
 *	txstate parameter can be supplied with a pointer to get a
 *	struct with auxiliary transfer status information, otherwise the call
 *	will just return a simple status code
 * @device_issue_pending: push pending transactions to hardware
 * @device_release: called sometime atfer dma_async_device_unregister() is
 *     called and there are no further references to this structure. This
 *     must be implemented to free resources however many existing drivers
 *     do not and are therefore not safe to unbind while in use.
 * @dbg_summary_show: optional routine to show contents in debugfs; default code
 *     will be used when this is omitted, but custom code can show extra,
 *     controller specific information.
 * @dbg_dev_root: the root folder in debugfs for this device
 */
struct dma_device {
	struct kref ref;
	unsigned int chancnt;
	unsigned int privatecnt;
	struct list_head channels;
	struct list_head global_node;
	struct dma_filter filter;
	dma_cap_mask_t cap_mask;
	enum dma_desc_metadata_mode desc_metadata_modes;
	unsigned short max_xor;
	unsigned short max_pq;
	enum dmaengine_alignment copy_align;
	enum dmaengine_alignment xor_align;
	enum dmaengine_alignment pq_align;
	enum dmaengine_alignment fill_align;
	#define DMA_HAS_PQ_CONTINUE (1 << 15)

int dev_id;
	struct device *dev;
	struct module *owner;
	struct ida chan_ida;

u32 src_addr_widths;
	u32 dst_addr_widths;
	u32 directions;
	u32 min_burst;
	u32 max_burst;
	u32 max_sg_burst;
	bool descriptor_reuse;
	enum dma_residue_granularity residue_granularity;

int (*device_alloc_chan_resources)(struct dma_chan *chan);
	int (*device_router_config)(struct dma_chan *chan);
	void (*device_free_chan_resources)(struct dma_chan *chan);

struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
		struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
		size_t len, unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_xor)(
		struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
		unsigned int src_cnt, size_t len, unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_xor_val)(
		struct dma_chan *chan, dma_addr_t *src,	unsigned int src_cnt,
		size_t len, enum sum_check_flags *result, unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_pq)(
		struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
		unsigned int src_cnt, const unsigned char *scf,
		size_t len, unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_pq_val)(
		struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
		unsigned int src_cnt, const unsigned char *scf, size_t len,
		enum sum_check_flags *pqres, unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_memset)(
		struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
		unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_memset_sg)(
		struct dma_chan *chan, struct scatterlist *sg,
		unsigned int nents, int value, unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
		struct dma_chan *chan, unsigned long flags);

struct dma_async_tx_descriptor *(*device_prep_slave_sg)(
		struct dma_chan *chan, struct scatterlist *sgl,
		unsigned int sg_len, enum dma_transfer_direction direction,
		unsigned long flags, void *context);
	struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
		struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
		size_t period_len, enum dma_transfer_direction direction,
		unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
		struct dma_chan *chan, struct dma_interleaved_template *xt,
		unsigned long flags);
	struct dma_async_tx_descriptor *(*device_prep_dma_imm_data)(
		struct dma_chan *chan, dma_addr_t dst, u64 data,
		unsigned long flags);

void (*device_caps)(struct dma_chan *chan, struct dma_slave_caps *caps);
	int (*device_config)(struct dma_chan *chan, struct dma_slave_config *config);
	int (*device_pause)(struct dma_chan *chan);
	int (*device_resume)(struct dma_chan *chan);
	int (*device_terminate_all)(struct dma_chan *chan);
	void (*device_synchronize)(struct dma_chan *chan);

enum dma_status (*device_tx_status)(struct dma_chan *chan,
					    dma_cookie_t cookie,
					    struct dma_tx_state *txstate);
	void (*device_issue_pending)(struct dma_chan *chan);
	void (*device_release)(struct dma_device *dev);
	/* debugfs support */
	void (*dbg_summary_show)(struct seq_file *s, struct dma_device *dev);
	struct dentry *dbg_dev_root;
};

static inline int dmaengine_slave_config(struct dma_chan *chan,
					  struct dma_slave_config *config)
{
	if (chan->device->device_config)
		return chan->device->device_config(chan, config);

return -ENOSYS;
}

static inline bool is_slave_direction(enum dma_transfer_direction direction)
{
	return (direction == DMA_MEM_TO_DEV) || (direction == DMA_DEV_TO_MEM) ||
	       (direction == DMA_DEV_TO_DEV);
}

static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
	struct dma_chan *chan, dma_addr_t buf, size_t len,
	enum dma_transfer_direction dir, unsigned long flags)
{
	struct scatterlist sg;
	sg_init_table(&sg, 1);
	sg_dma_address(&sg) = buf;
	sg_dma_len(&sg) = len;

if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
		return NULL;

return chan->device->device_prep_slave_sg(chan, &sg, 1,
						  dir, flags, NULL);
}

static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
	struct dma_chan *chan, struct scatterlist *sgl,	unsigned int sg_len,
	enum dma_transfer_direction dir, unsigned long flags)
{
	if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
		return NULL;

return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
						  dir, flags, NULL);
}

#ifdef CONFIG_RAPIDIO_DMA_ENGINE
struct rio_dma_ext;
static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg(
	struct dma_chan *chan, struct scatterlist *sgl,	unsigned int sg_len,
	enum dma_transfer_direction dir, unsigned long flags,
	struct rio_dma_ext *rio_ext)
{
	if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
		return NULL;

return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
						  dir, flags, rio_ext);
}
#endif

static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
		struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
		size_t period_len, enum dma_transfer_direction dir,
		unsigned long flags)
{
	if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic)
		return NULL;

return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
						period_len, dir, flags);
}

static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
		struct dma_chan *chan, struct dma_interleaved_template *xt,
		unsigned long flags)
{
	if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma)
		return NULL;
	if (flags & DMA_PREP_REPEAT &&
	    !test_bit(DMA_REPEAT, chan->device->cap_mask.bits))
		return NULL;

return chan->device->device_prep_interleaved_dma(chan, xt, flags);
}

/**
 * dmaengine_prep_dma_memset() - Prepare a DMA memset descriptor.
 * @chan: The channel to be used for this descriptor
 * @dest: Address of buffer to be set
 * @value: Treated as a single byte value that fills the destination buffer
 * @len: The total size of dest
 * @flags: DMA engine flags
 */
static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset(
		struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
		unsigned long flags)
{
	if (!chan || !chan->device || !chan->device->device_prep_dma_memset)
		return NULL;

return chan->device->device_prep_dma_memset(chan, dest, value,
						    len, flags);
}

static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memcpy(
		struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
		size_t len, unsigned long flags)
{
	if (!chan || !chan->device || !chan->device->device_prep_dma_memcpy)
		return NULL;

return chan->device->device_prep_dma_memcpy(chan, dest, src,
						    len, flags);
}

static inline bool dmaengine_is_metadata_mode_supported(struct dma_chan *chan,
		enum dma_desc_metadata_mode mode)
{
	if (!chan)
		return false;

return !!(chan->device->desc_metadata_modes & mode);
}

#ifdef CONFIG_DMA_ENGINE
int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc,
				   void *data, size_t len);
void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc,
				      size_t *payload_len, size_t *max_len);
int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc,
				    size_t payload_len);
#else /* CONFIG_DMA_ENGINE */
static inline int dmaengine_desc_attach_metadata(
		struct dma_async_tx_descriptor *desc, void *data, size_t len)
{
	return -EINVAL;
}
static inline void *dmaengine_desc_get_metadata_ptr(
		struct dma_async_tx_descriptor *desc, size_t *payload_len,
		size_t *max_len)
{
	return NULL;
}
static inline int dmaengine_desc_set_metadata_len(
		struct dma_async_tx_descriptor *desc, size_t payload_len)
{
	return -EINVAL;
}
#endif /* CONFIG_DMA_ENGINE */

/**
 * dmaengine_terminate_all() - Terminate all active DMA transfers
 * @chan: The channel for which to terminate the transfers
 *
 * This function is DEPRECATED use either dmaengine_terminate_sync() or
 * dmaengine_terminate_async() instead.
 */
static inline int dmaengine_terminate_all(struct dma_chan *chan)
{
	if (chan->device->device_terminate_all)
		return chan->device->device_terminate_all(chan);

return -ENOSYS;
}

/**
 * dmaengine_terminate_async() - Terminate all active DMA transfers
 * @chan: The channel for which to terminate the transfers
 *
 * Calling this function will terminate all active and pending descriptors
 * that have previously been submitted to the channel. It is not guaranteed
 * though that the transfer for the active descriptor has stopped when the
 * function returns. Furthermore it is possible the complete callback of a
 * submitted transfer is still running when this function returns.
 *
 * dmaengine_synchronize() needs to be called before it is safe to free
 * any memory that is accessed by previously submitted descriptors or before
 * freeing any resources accessed from within the completion callback of any
 * previously submitted descriptors.
 *
 * This function can be called from atomic context as well as from within a
 * complete callback of a descriptor submitted on the same channel.
 *
 * If none of the two conditions above apply consider using
 * dmaengine_terminate_sync() instead.
 */
static inline int dmaengine_terminate_async(struct dma_chan *chan)
{
	if (chan->device->device_terminate_all)
		return chan->device->device_terminate_all(chan);

return -EINVAL;
}

/**
 * dmaengine_synchronize() - Synchronize DMA channel termination
 * @chan: The channel to synchronize
 *
 * Synchronizes to the DMA channel termination to the current context. When this
 * function returns it is guaranteed that all transfers for previously issued
 * descriptors have stopped and it is safe to free the memory associated
 * with them. Furthermore it is guaranteed that all complete callback functions
 * for a previously submitted descriptor have finished running and it is safe to
 * free resources accessed from within the complete callbacks.
 *
 * The behavior of this function is undefined if dma_async_issue_pending() has
 * been called between dmaengine_terminate_async() and this function.
 *
 * This function must only be called from non-atomic context and must not be
 * called from within a complete callback of a descriptor submitted on the same
 * channel.
 */
static inline void dmaengine_synchronize(struct dma_chan *chan)
{
	might_sleep();

if (chan->device->device_synchronize)
		chan->device->device_synchronize(chan);
}

/**
 * dmaengine_terminate_sync() - Terminate all active DMA transfers
 * @chan: The channel for which to terminate the transfers
 *
 * Calling this function will terminate all active and pending transfers
 * that have previously been submitted to the channel. It is similar to
 * dmaengine_terminate_async() but guarantees that the DMA transfer has actually
 * stopped and that all complete callbacks have finished running when the
 * function returns.
 *
 * This function must only be called from non-atomic context and must not be
 * called from within a complete callback of a descriptor submitted on the same
 * channel.
 */
static inline int dmaengine_terminate_sync(struct dma_chan *chan)
{
	int ret;

ret = dmaengine_terminate_async(chan);
	if (ret)
		return ret;

dmaengine_synchronize(chan);

return 0;
}

static inline int dmaengine_pause(struct dma_chan *chan)
{
	if (chan->device->device_pause)
		return chan->device->device_pause(chan);

return -ENOSYS;
}

static inline int dmaengine_resume(struct dma_chan *chan)
{
	if (chan->device->device_resume)
		return chan->device->device_resume(chan);

return -ENOSYS;
}

static inline enum dma_status dmaengine_tx_status(struct dma_chan *chan,
	dma_cookie_t cookie, struct dma_tx_state *state)
{
	return chan->device->device_tx_status(chan, cookie, state);
}

static inline dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc)
{
	return desc->tx_submit(desc);
}

static inline bool dmaengine_check_align(enum dmaengine_alignment align,
					 size_t off1, size_t off2, size_t len)
{
	return !(((1 << align) - 1) & (off1 | off2 | len));
}

static inline bool is_dma_copy_aligned(struct dma_device *dev, size_t off1,
				       size_t off2, size_t len)
{
	return dmaengine_check_align(dev->copy_align, off1, off2, len);
}

static inline bool is_dma_xor_aligned(struct dma_device *dev, size_t off1,
				      size_t off2, size_t len)
{
	return dmaengine_check_align(dev->xor_align, off1, off2, len);
}

static inline bool is_dma_pq_aligned(struct dma_device *dev, size_t off1,
				     size_t off2, size_t len)
{
	return dmaengine_check_align(dev->pq_align, off1, off2, len);
}

static inline bool is_dma_fill_aligned(struct dma_device *dev, size_t off1,
				       size_t off2, size_t len)
{
	return dmaengine_check_align(dev->fill_align, off1, off2, len);
}

static inline void
dma_set_maxpq(struct dma_device *dma, int maxpq, int has_pq_continue)
{
	dma->max_pq = maxpq;
	if (has_pq_continue)
		dma->max_pq |= DMA_HAS_PQ_CONTINUE;
}

static inline bool dmaf_continue(enum dma_ctrl_flags flags)
{
	return (flags & DMA_PREP_CONTINUE) == DMA_PREP_CONTINUE;
}

static inline bool dmaf_p_disabled_continue(enum dma_ctrl_flags flags)
{
	enum dma_ctrl_flags mask = DMA_PREP_CONTINUE | DMA_PREP_PQ_DISABLE_P;

return (flags & mask) == mask;
}

static inline bool dma_dev_has_pq_continue(struct dma_device *dma)
{
	return (dma->max_pq & DMA_HAS_PQ_CONTINUE) == DMA_HAS_PQ_CONTINUE;
}

static inline unsigned short dma_dev_to_maxpq(struct dma_device *dma)
{
	return dma->max_pq & ~DMA_HAS_PQ_CONTINUE;
}

/* dma_maxpq - reduce maxpq in the face of continued operations
 * @dma - dma device with PQ capability
 * @flags - to check if DMA_PREP_CONTINUE and DMA_PREP_PQ_DISABLE_P are set
 *
 * When an engine does not support native continuation we need 3 extra
 * source slots to reuse P and Q with the following coefficients:
 * 1/ {00} * P : remove P from Q', but use it as a source for P'
 * 2/ {01} * Q : use Q to continue Q' calculation
 * 3/ {00} * Q : subtract Q from P' to cancel (2)
 *
 * In the case where P is disabled we only need 1 extra source:
 * 1/ {01} * Q : use Q to continue Q' calculation
 */
static inline int dma_maxpq(struct dma_device *dma, enum dma_ctrl_flags flags)
{
	if (dma_dev_has_pq_continue(dma) || !dmaf_continue(flags))
		return dma_dev_to_maxpq(dma);
	if (dmaf_p_disabled_continue(flags))
		return dma_dev_to_maxpq(dma) - 1;
	if (dmaf_continue(flags))
		return dma_dev_to_maxpq(dma) - 3;
	BUG();
}

static inline size_t dmaengine_get_icg(bool inc, bool sgl, size_t icg,
				      size_t dir_icg)
{
	if (inc) {
		if (dir_icg)
			return dir_icg;
		if (sgl)
			return icg;
	}

return 0;
}

static inline size_t dmaengine_get_dst_icg(struct dma_interleaved_template *xt,
					   struct data_chunk *chunk)
{
	return dmaengine_get_icg(xt->dst_inc, xt->dst_sgl,
				 chunk->icg, chunk->dst_icg);
}

static inline size_t dmaengine_get_src_icg(struct dma_interleaved_template *xt,
					   struct data_chunk *chunk)
{
	return dmaengine_get_icg(xt->src_inc, xt->src_sgl,
				 chunk->icg, chunk->src_icg);
}

/* --- public DMA engine API --- */

#ifdef CONFIG_DMA_ENGINE
void dmaengine_get(void);
void dmaengine_put(void);
#else
static inline void dmaengine_get(void)
{
}
static inline void dmaengine_put(void)
{
}
#endif

#ifdef CONFIG_ASYNC_TX_DMA
#define async_dmaengine_get()	dmaengine_get()
#define async_dmaengine_put()	dmaengine_put()
#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
#define async_dma_find_channel(type) dma_find_channel(DMA_ASYNC_TX)
#else
#define async_dma_find_channel(type) dma_find_channel(type)
#endif /* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH */
#else
static inline void async_dmaengine_get(void)
{
}
static inline void async_dmaengine_put(void)
{
}
static inline struct dma_chan *
async_dma_find_channel(enum dma_transaction_type type)
{
	return NULL;
}
#endif /* CONFIG_ASYNC_TX_DMA */
void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
				  struct dma_chan *chan);

static inline void async_tx_ack(struct dma_async_tx_descriptor *tx)
{
	tx->flags |= DMA_CTRL_ACK;
}

static inline void async_tx_clear_ack(struct dma_async_tx_descriptor *tx)
{
	tx->flags &= ~DMA_CTRL_ACK;
}

static inline bool async_tx_test_ack(struct dma_async_tx_descriptor *tx)
{
	return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK;
}

#define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask))
static inline void
__dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp)
{
	set_bit(tx_type, dstp->bits);
}

#define dma_cap_clear(tx, mask) __dma_cap_clear((tx), &(mask))
static inline void
__dma_cap_clear(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp)
{
	clear_bit(tx_type, dstp->bits);
}

#define dma_cap_zero(mask) __dma_cap_zero(&(mask))
static inline void __dma_cap_zero(dma_cap_mask_t *dstp)
{
	bitmap_zero(dstp->bits, DMA_TX_TYPE_END);
}

#define dma_has_cap(tx, mask) __dma_has_cap((tx), &(mask))
static inline int
__dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp)
{
	return test_bit(tx_type, srcp->bits);
}

#define for_each_dma_cap_mask(cap, mask) \
	for_each_set_bit(cap, mask.bits, DMA_TX_TYPE_END)

/**
 * dma_async_issue_pending - flush pending transactions to HW
 * @chan: target DMA channel
 *
 * This allows drivers to push copies to HW in batches,
 * reducing MMIO writes where possible.
 */
static inline void dma_async_issue_pending(struct dma_chan *chan)
{
	chan->device->device_issue_pending(chan);
}

/**
 * dma_async_is_tx_complete - poll for transaction completion
 * @chan: DMA channel
 * @cookie: transaction identifier to check status of
 * @last: returns last completed cookie, can be NULL
 * @used: returns last issued cookie, can be NULL
 *
 * If @last and @used are passed in, upon return they reflect the driver
 * internal state and can be used with dma_async_is_complete() to check
 * the status of multiple cookies without re-checking hardware state.
 */
static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan,
	dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used)
{
	struct dma_tx_state state;
	enum dma_status status;

status = chan->device->device_tx_status(chan, cookie, &state);
	if (last)
		*last = state.last;
	if (used)
		*used = state.used;
	return status;
}

/**
 * dma_async_is_complete - test a cookie against chan state
 * @cookie: transaction identifier to test status of
 * @last_complete: last know completed transaction
 * @last_used: last cookie value handed out
 *
 * dma_async_is_complete() is used in dma_async_is_tx_complete()
 * the test logic is separated for lightweight testing of multiple cookies
 */
static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie,
			dma_cookie_t last_complete, dma_cookie_t last_used)
{
	if (last_complete <= last_used) {
		if ((cookie <= last_complete) || (cookie > last_used))
			return DMA_COMPLETE;
	} else {
		if ((cookie <= last_complete) && (cookie > last_used))
			return DMA_COMPLETE;
	}
	return DMA_IN_PROGRESS;
}

static inline void
dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue)
{
	if (!st)
		return;

st->last = last;
	st->used = used;
	st->residue = residue;
}

#ifdef CONFIG_DMA_ENGINE
struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type);
enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
void dma_issue_pending_all(void);
struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
				       dma_filter_fn fn, void *fn_param,
				       struct device_node *np);

struct dma_chan *dma_request_chan(struct device *dev, const char *name);
struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask);

void dma_release_channel(struct dma_chan *chan);
int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps);
#else
static inline struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
{
	return NULL;
}
static inline enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
{
	return DMA_COMPLETE;
}
static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
{
	return DMA_COMPLETE;
}
static inline void dma_issue_pending_all(void)
{
}
static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
						     dma_filter_fn fn,
						     void *fn_param,
						     struct device_node *np)
{
	return NULL;
}
static inline struct dma_chan *dma_request_chan(struct device *dev,
						const char *name)
{
	return ERR_PTR(-ENODEV);
}
static inline struct dma_chan *dma_request_chan_by_mask(
						const dma_cap_mask_t *mask)
{
	return ERR_PTR(-ENODEV);
}
static inline void dma_release_channel(struct dma_chan *chan)
{
}
static inline int dma_get_slave_caps(struct dma_chan *chan,
				     struct dma_slave_caps *caps)
{
	return -ENXIO;
}
#endif

static inline int dmaengine_desc_set_reuse(struct dma_async_tx_descriptor *tx)
{
	struct dma_slave_caps caps;
	int ret;

ret = dma_get_slave_caps(tx->chan, &caps);
	if (ret)
		return ret;

if (!caps.descriptor_reuse)
		return -EPERM;

tx->flags |= DMA_CTRL_REUSE;
	return 0;
}

static inline void dmaengine_desc_clear_reuse(struct dma_async_tx_descriptor *tx)
{
	tx->flags &= ~DMA_CTRL_REUSE;
}

static inline bool dmaengine_desc_test_reuse(struct dma_async_tx_descriptor *tx)
{
	return (tx->flags & DMA_CTRL_REUSE) == DMA_CTRL_REUSE;
}

static inline int dmaengine_desc_free(struct dma_async_tx_descriptor *desc)
{
	/* this is supported for reusable desc, so check that */
	if (!dmaengine_desc_test_reuse(desc))
		return -EPERM;

return desc->desc_free(desc);
}

/* --- DMA device --- */

int dma_async_device_register(struct dma_device *device);
int dmaenginem_async_device_register(struct dma_device *device);
void dma_async_device_unregister(struct dma_device *device);
int dma_async_device_channel_register(struct dma_device *device,
				      struct dma_chan *chan);
void dma_async_device_channel_unregister(struct dma_device *device,
					 struct dma_chan *chan);
void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
#define dma_request_channel(mask, x, y) \
	__dma_request_channel(&(mask), x, y, NULL)

/* Deprecated, please use dma_request_chan() directly */
static inline struct dma_chan * __deprecated
dma_request_slave_channel(struct device *dev, const char *name)
{
	struct dma_chan *ch = dma_request_chan(dev, name);

return IS_ERR(ch) ? NULL : ch;
}

static inline struct dma_chan
*dma_request_slave_channel_compat(const dma_cap_mask_t mask,
				  dma_filter_fn fn, void *fn_param,
				  struct device *dev, const char *name)
{
	struct dma_chan *chan;

chan = dma_request_slave_channel(dev, name);
	if (chan)
		return chan;

if (!fn || !fn_param)
		return NULL;

return __dma_request_channel(&mask, fn, fn_param, NULL);
}

static inline char *
dmaengine_get_direction_text(enum dma_transfer_direction dir)
{
	switch (dir) {
	case DMA_DEV_TO_MEM:
		return "DEV_TO_MEM";
	case DMA_MEM_TO_DEV:
		return "MEM_TO_DEV";
	case DMA_MEM_TO_MEM:
		return "MEM_TO_MEM";
	case DMA_DEV_TO_DEV:
		return "DEV_TO_DEV";
	default:
		return "invalid";
	}
}

static inline struct device *dmaengine_get_dma_device(struct dma_chan *chan)
{
	if (chan->dev->chan_dma_dev)
		return &chan->dev->device;

return chan->device->dev;
}

#endif /* DMAENGINE_H */