Gecko [ www.jobworksschool.com ]

Name	Size	Permission	Date
amba	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
atomic	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
avf	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
bcma	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
byteorder	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
can	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
cdx	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
ceph	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
clk	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
comedi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
crush	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
decompress	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
device	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
dma	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
dsa	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
extcon	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
firmware	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
fpga	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
framer	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
fsl	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
gpio	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
greybus	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
habanalabs	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
hsi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
i3c	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
iio	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
input	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
io_uring	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
irqchip	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
isdn	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
lockd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
lsm	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mailbox	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mdio	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mfd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mlx4	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mlx5	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mmc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mtd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
mux	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
net	[ DIR ]	drwxr-xr-x	2026-07-17 06:28
netfilter	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_arp	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_bridge	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_ipv4	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
netfilter_ipv6	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pcs	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pds	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
perf	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
phy	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pinctrl	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
platform_data	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
power	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
pse-pd	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
qed	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
raid	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
regulator	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
remoteproc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
reset	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
rpmsg	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
rtc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
sched	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
soc	[ DIR ]	drwxr-xr-x	2026-07-17 06:28
soundwire	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
spi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
ssb	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
sunrpc	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
surface_aggregator	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
ulpi	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
unaligned	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
usb	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
8250_pci.h	1.01 KB	-rw-r--r--	2024-03-10 20:38
acct.h	2.45 KB	-rw-r--r--	2024-03-10 20:38
acpi.h	44.11 KB	-rw-r--r--	2026-07-01 19:48
acpi_amd_wbrf.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
acpi_dma.h	3.08 KB	-rw-r--r--	2024-03-10 20:38
acpi_iort.h	2.64 KB	-rw-r--r--	2024-03-10 20:38
acpi_mdio.h	819 B	-rw-r--r--	2024-03-10 20:38
acpi_pmtmr.h	674 B	-rw-r--r--	2024-03-10 20:38
acpi_viot.h	478 B	-rw-r--r--	2024-03-10 20:38
adb.h	1.79 KB	-rw-r--r--	2024-03-10 20:38
adfs_fs.h	574 B	-rw-r--r--	2024-03-10 20:38
adreno-smmu-priv.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
adxl.h	310 B	-rw-r--r--	2024-03-10 20:38
aer.h	1.29 KB	-rw-r--r--	2024-03-10 20:38
agp_backend.h	3.45 KB	-rw-r--r--	2024-03-10 20:38
agpgart.h	3.79 KB	-rw-r--r--	2024-03-10 20:38
ahci-remap.h	607 B	-rw-r--r--	2024-03-10 20:38
ahci_platform.h	1.81 KB	-rw-r--r--	2024-03-10 20:38
aio.h	570 B	-rw-r--r--	2024-03-10 20:38
alarmtimer.h	1.94 KB	-rw-r--r--	2024-03-10 20:38
alcor_pci.h	8.7 KB	-rw-r--r--	2024-03-10 20:38
align.h	552 B	-rw-r--r--	2024-03-10 20:38
altera_jtaguart.h	379 B	-rw-r--r--	2024-03-10 20:38
altera_uart.h	397 B	-rw-r--r--	2024-03-10 20:38
amd-iommu.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
amd-pmf-io.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
anon_inodes.h	855 B	-rw-r--r--	2024-03-10 20:38
aperture.h	1.61 KB	-rw-r--r--	2024-03-10 20:38
apm-emulation.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
apm_bios.h	2.25 KB	-rw-r--r--	2024-03-10 20:38
apple-gmux.h	4.63 KB	-rw-r--r--	2024-03-10 20:38
arch_topology.h	3 KB	-rw-r--r--	2024-03-10 20:38
args.h	994 B	-rw-r--r--	2024-03-10 20:38
arm-cci.h	1.39 KB	-rw-r--r--	2024-03-10 20:38
arm-smccc.h	17.18 KB	-rw-r--r--	2026-07-01 19:48
arm_ffa.h	13.25 KB	-rw-r--r--	2024-03-10 20:38
arm_sdei.h	2.67 KB	-rw-r--r--	2026-07-01 19:48
armada-37xx-rwtm-mailbox.h	431 B	-rw-r--r--	2024-03-10 20:38
array_size.h	332 B	-rw-r--r--	2024-03-10 20:38
ascii85.h	555 B	-rw-r--r--	2024-03-10 20:38
asn1.h	1.79 KB	-rw-r--r--	2024-03-10 20:38
asn1_ber_bytecode.h	2.52 KB	-rw-r--r--	2024-03-10 20:38
asn1_decoder.h	468 B	-rw-r--r--	2024-03-10 20:38
asn1_encoder.h	1006 B	-rw-r--r--	2024-03-10 20:38
assoc_array.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
assoc_array_priv.h	5.3 KB	-rw-r--r--	2024-03-10 20:38
async.h	4.33 KB	-rw-r--r--	2024-03-10 20:38
async_tx.h	6.7 KB	-rw-r--r--	2024-03-10 20:38
ata.h	30.45 KB	-rw-r--r--	2026-07-01 19:48
ata_platform.h	755 B	-rw-r--r--	2024-03-10 20:38
atalk.h	4.45 KB	-rw-r--r--	2024-03-10 20:38
ath9k_platform.h	1.44 KB	-rw-r--r--	2024-03-10 20:38
atm.h	287 B	-rw-r--r--	2024-03-10 20:38
atm_tcp.h	542 B	-rw-r--r--	2024-03-10 20:38
atmdev.h	10.23 KB	-rw-r--r--	2026-07-01 19:48
atmel-isc-media.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
atmel-ssc.h	9.74 KB	-rw-r--r--	2024-03-10 20:38
atmel_pdc.h	1.26 KB	-rw-r--r--	2024-03-10 20:38
atomic.h	2.58 KB	-rw-r--r--	2024-03-10 20:38
attribute_container.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
audit.h	20.24 KB	-rw-r--r--	2026-07-01 19:48
audit_arch.h	784 B	-rw-r--r--	2026-07-01 19:48
auto_dev-ioctl.h	296 B	-rw-r--r--	2024-03-10 20:38
auto_fs.h	278 B	-rw-r--r--	2024-03-10 20:38
auxiliary_bus.h	9.67 KB	-rw-r--r--	2024-03-10 20:38
auxvec.h	304 B	-rw-r--r--	2024-03-10 20:38
average.h	2.42 KB	-rw-r--r--	2024-03-10 20:38
backing-dev-defs.h	8.4 KB	-rw-r--r--	2024-03-10 20:38
backing-dev.h	10.46 KB	-rw-r--r--	2026-07-01 19:48
backing-file.h	1.34 KB	-rw-r--r--	2024-03-10 20:38
backlight.h	13.13 KB	-rw-r--r--	2024-03-10 20:38
badblocks.h	2.63 KB	-rw-r--r--	2024-03-10 20:38
balloon_compaction.h	5.69 KB	-rw-r--r--	2026-07-01 19:48
base64.h	370 B	-rw-r--r--	2024-03-10 20:38
bcd.h	683 B	-rw-r--r--	2024-03-10 20:38
bch.h	2.1 KB	-rw-r--r--	2024-03-10 20:38
bcm47xx_nvram.h	1.2 KB	-rw-r--r--	2024-03-10 20:38
bcm47xx_sprom.h	616 B	-rw-r--r--	2024-03-10 20:38
bcm47xx_wdt.h	555 B	-rw-r--r--	2024-03-10 20:38
bcm963xx_nvram.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
bcm963xx_tag.h	3.6 KB	-rw-r--r--	2024-03-10 20:38
binfmts.h	4.51 KB	-rw-r--r--	2026-07-01 19:48
bio.h	21.19 KB	-rw-r--r--	2026-07-01 19:48
bit_spinlock.h	2.3 KB	-rw-r--r--	2024-03-10 20:38
bitfield.h	6.37 KB	-rw-r--r--	2024-03-10 20:38
bitmap-str.h	842 B	-rw-r--r--	2024-03-10 20:38
bitmap.h	26.05 KB	-rw-r--r--	2026-07-01 19:48
bitops.h	9.59 KB	-rw-r--r--	2026-07-01 19:48
bitrev.h	2.53 KB	-rw-r--r--	2024-03-10 20:38
bits.h	2.48 KB	-rw-r--r--	2026-07-01 19:48
blk-cgroup.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
blk-crypto-profile.h	5.3 KB	-rw-r--r--	2024-03-10 20:38
blk-crypto.h	4.13 KB	-rw-r--r--	2024-03-10 20:38
blk-integrity.h	4.68 KB	-rw-r--r--	2026-07-01 19:48
blk-mq-pci.h	271 B	-rw-r--r--	2024-03-10 20:38
blk-mq-virtio.h	294 B	-rw-r--r--	2024-03-10 20:38
blk-mq.h	35.19 KB	-rw-r--r--	2026-07-01 19:48
blk-pm.h	647 B	-rw-r--r--	2024-03-10 20:38
blk_types.h	16.5 KB	-rw-r--r--	2026-07-01 19:48
blkdev.h	45.69 KB	-rw-r--r--	2026-07-01 19:48
blkpg.h	436 B	-rw-r--r--	2024-03-10 20:38
blktrace_api.h	3.55 KB	-rw-r--r--	2024-03-10 20:38
blockgroup_lock.h	810 B	-rw-r--r--	2024-03-10 20:38
bma150.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
bootconfig.h	9.27 KB	-rw-r--r--	2026-07-01 19:48
bootmem_info.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
bottom_half.h	1013 B	-rw-r--r--	2024-03-10 20:38
bpf-cgroup-defs.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
bpf-cgroup.h	18.2 KB	-rw-r--r--	2026-07-01 19:48
bpf-netns.h	1.41 KB	-rw-r--r--	2024-03-10 20:38
bpf.h	103.56 KB	-rw-r--r--	2026-07-01 19:48
bpf_lirc.h	698 B	-rw-r--r--	2024-03-10 20:38
bpf_local_storage.h	5.61 KB	-rw-r--r--	2024-03-10 20:38
bpf_lsm.h	2.01 KB	-rw-r--r--	2026-07-01 19:48
bpf_mem_alloc.h	2.05 KB	-rw-r--r--	2026-07-01 19:48
bpf_mprog.h	9.29 KB	-rw-r--r--	2024-03-10 20:38
bpf_trace.h	166 B	-rw-r--r--	2024-03-10 20:38
bpf_types.h	6.01 KB	-rw-r--r--	2024-03-10 20:38
bpf_verifier.h	31.84 KB	-rw-r--r--	2026-07-01 19:48
bpfptr.h	2 KB	-rw-r--r--	2024-03-10 20:38
brcmphy.h	16.93 KB	-rw-r--r--	2024-03-10 20:38
bsearch.h	624 B	-rw-r--r--	2024-03-10 20:38
bsg-lib.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
bsg.h	499 B	-rw-r--r--	2024-03-10 20:38
btf.h	17.37 KB	-rw-r--r--	2026-07-01 19:48
btf_ids.h	7.67 KB	-rw-r--r--	2024-03-10 20:38
btree-128.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
btree-type.h	3.9 KB	-rw-r--r--	2024-03-10 20:38
btree.h	6.84 KB	-rw-r--r--	2024-03-10 20:38
btrfs.h	145 B	-rw-r--r--	2024-03-10 20:38
buffer_head.h	16.34 KB	-rw-r--r--	2026-07-01 19:48
bug.h	2.17 KB	-rw-r--r--	2024-03-10 20:38
build-salt.h	375 B	-rw-r--r--	2024-03-10 20:38
build_bug.h	2.99 KB	-rw-r--r--	2024-03-10 20:38
buildid.h	581 B	-rw-r--r--	2024-03-10 20:38
bvec.h	7.31 KB	-rw-r--r--	2026-07-01 19:48
c2port.h	1.35 KB	-rw-r--r--	2024-03-10 20:38
cache.h	5.51 KB	-rw-r--r--	2026-07-01 19:48
cacheflush.h	675 B	-rw-r--r--	2024-03-10 20:38
cacheinfo.h	4.27 KB	-rw-r--r--	2024-03-10 20:38
call_once.h	1.67 KB	-rw-r--r--	2026-07-01 19:48
capability.h	6.45 KB	-rw-r--r--	2026-07-01 19:48
cb710.h	5.36 KB	-rw-r--r--	2024-03-10 20:38
cc_platform.h	3.07 KB	-rw-r--r--	2024-03-10 20:38
cciss_ioctl.h	1.03 KB	-rw-r--r--	2024-03-10 20:38
ccp.h	18.14 KB	-rw-r--r--	2024-03-10 20:38
cdev.h	845 B	-rw-r--r--	2024-03-10 20:38
cdrom.h	8.99 KB	-rw-r--r--	2026-07-01 19:48
cfag12864b.h	1.47 KB	-rw-r--r--	2024-03-10 20:38
cfi.h	1.23 KB	-rw-r--r--	2024-03-10 20:38
cfi_types.h	1.06 KB	-rw-r--r--	2024-03-10 20:38
cgroup-defs.h	26.29 KB	-rw-r--r--	2026-07-01 19:48
cgroup.h	26.3 KB	-rw-r--r--	2026-07-01 19:48
cgroup_api.h	26 B	-rw-r--r--	2024-03-10 20:38
cgroup_rdma.h	1.18 KB	-rw-r--r--	2024-03-10 20:38
cgroup_refcnt.h	2.59 KB	-rw-r--r--	2024-03-10 20:38
cgroup_subsys.h	1.23 KB	-rw-r--r--	2024-03-10 20:38
circ_buf.h	1.09 KB	-rw-r--r--	2024-03-10 20:38
cleanup.h	9.41 KB	-rw-r--r--	2026-07-01 19:48
clk-provider.h	62.98 KB	-rw-r--r--	2024-03-10 20:38
clk.h	34.21 KB	-rw-r--r--	2026-07-01 19:48
clkdev.h	1.2 KB	-rw-r--r--	2024-03-10 20:38
clockchips.h	7.29 KB	-rw-r--r--	2024-03-10 20:38
clocksource.h	9.99 KB	-rw-r--r--	2026-07-01 19:48
clocksource_ids.h	247 B	-rw-r--r--	2024-03-10 20:38
closure.h	12.33 KB	-rw-r--r--	2024-03-10 20:38
cma.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
cn_proc.h	1.85 KB	-rw-r--r--	2024-03-10 20:38
cnt32_to_63.h	3.46 KB	-rw-r--r--	2024-03-10 20:38
coda.h	2.16 KB	-rw-r--r--	2024-03-10 20:38
compaction.h	4.5 KB	-rw-r--r--	2026-07-01 19:48
compat.h	32.32 KB	-rw-r--r--	2026-07-01 19:48
compiler-clang.h	4.5 KB	-rw-r--r--	2026-07-01 19:48
compiler-gcc.h	4.57 KB	-rw-r--r--	2026-07-01 19:48
compiler-version.h	517 B	-rw-r--r--	2024-03-10 20:38
compiler.h	7.87 KB	-rw-r--r--	2026-07-01 19:48
compiler_attributes.h	15.33 KB	-rw-r--r--	2026-07-01 19:48
compiler_types.h	17.21 KB	-rw-r--r--	2026-07-01 19:48
completion.h	4.14 KB	-rw-r--r--	2024-03-10 20:38
component.h	4.35 KB	-rw-r--r--	2024-03-10 20:38
configfs.h	8.35 KB	-rw-r--r--	2024-03-10 20:38
connector.h	4.01 KB	-rw-r--r--	2024-03-10 20:38
console.h	17.63 KB	-rw-r--r--	2026-07-01 19:48
console_struct.h	7.05 KB	-rw-r--r--	2024-03-10 20:38
consolemap.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
const.h	100 B	-rw-r--r--	2024-03-10 20:38
container.h	616 B	-rw-r--r--	2024-03-10 20:38
container_of.h	1.3 KB	-rw-r--r--	2024-03-10 20:38
context_tracking.h	4.15 KB	-rw-r--r--	2024-03-10 20:38
context_tracking_irq.h	633 B	-rw-r--r--	2026-07-01 19:48
context_tracking_state.h	3.84 KB	-rw-r--r--	2024-03-10 20:38
cookie.h	1.22 KB	-rw-r--r--	2024-03-10 20:38
cordic.h	2.08 KB	-rw-r--r--	2024-03-10 20:38
coredump.h	1.43 KB	-rw-r--r--	2024-03-10 20:38
coresight-pmu.h	1.86 KB	-rw-r--r--	2024-03-10 20:38
coresight-stm.h	152 B	-rw-r--r--	2024-03-10 20:38
coresight.h	21.27 KB	-rw-r--r--	2026-07-01 19:48
count_zeros.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
counter.h	21.39 KB	-rw-r--r--	2026-07-01 19:48
cper.h	17.75 KB	-rw-r--r--	2026-07-01 19:48
cpu.h	7.69 KB	-rw-r--r--	2026-07-01 19:48
cpu_cooling.h	1.86 KB	-rw-r--r--	2024-03-10 20:38
cpu_pm.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
cpu_rmap.h	1.7 KB	-rw-r--r--	2024-03-10 20:38
cpu_smt.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
cpufeature.h	1.71 KB	-rw-r--r--	2024-03-10 20:38
cpufreq.h	37 KB	-rw-r--r--	2026-07-01 19:48
cpuhotplug.h	16.78 KB	-rw-r--r--	2026-07-01 19:48
cpuidle.h	11.42 KB	-rw-r--r--	2024-03-10 20:38
cpuidle_haltpoll.h	312 B	-rw-r--r--	2024-03-10 20:38
cpumask.h	36.17 KB	-rw-r--r--	2026-07-01 19:48
cpumask_api.h	27 B	-rw-r--r--	2024-03-10 20:38
cpuset.h	7.94 KB	-rw-r--r--	2026-07-01 19:48
crash_core.h	4.92 KB	-rw-r--r--	2024-03-10 20:38
crash_dump.h	5.04 KB	-rw-r--r--	2024-03-10 20:38
crc-ccitt.h	369 B	-rw-r--r--	2024-03-10 20:38
crc-itu-t.h	530 B	-rw-r--r--	2024-03-10 20:38
crc-t10dif.h	453 B	-rw-r--r--	2024-03-10 20:38
crc16.h	540 B	-rw-r--r--	2024-03-10 20:38
crc32.h	2.83 KB	-rw-r--r--	2024-03-10 20:38
crc32c.h	293 B	-rw-r--r--	2024-03-10 20:38
crc32poly.h	610 B	-rw-r--r--	2024-03-10 20:38
crc4.h	192 B	-rw-r--r--	2024-03-10 20:38
crc64.h	539 B	-rw-r--r--	2024-03-10 20:38
crc7.h	316 B	-rw-r--r--	2024-03-10 20:38
crc8.h	3.66 KB	-rw-r--r--	2024-03-10 20:38
cred.h	12.46 KB	-rw-r--r--	2024-03-10 20:38
crypto.h	19.01 KB	-rw-r--r--	2024-03-10 20:38
cs5535.h	6.13 KB	-rw-r--r--	2024-03-10 20:38
ctype.h	1.87 KB	-rw-r--r--	2024-03-10 20:38
cuda.h	620 B	-rw-r--r--	2024-03-10 20:38
cxl-event.h	2.93 KB	-rw-r--r--	2024-03-10 20:38
damon.h	27.06 KB	-rw-r--r--	2026-07-01 19:48
dasd_mod.h	204 B	-rw-r--r--	2024-03-10 20:38
davinci_emac.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
dax.h	8.88 KB	-rw-r--r--	2024-03-10 20:38
dca.h	1.88 KB	-rw-r--r--	2024-03-10 20:38
dcache.h	18.11 KB	-rw-r--r--	2026-07-01 19:48
dccp.h	10.74 KB	-rw-r--r--	2024-03-10 20:38
debug_locks.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
debugfs.h	12.5 KB	-rw-r--r--	2024-03-10 20:38
debugobjects.h	3.99 KB	-rw-r--r--	2024-03-10 20:38
delay.h	2.47 KB	-rw-r--r--	2024-03-10 20:38
delayacct.h	6.76 KB	-rw-r--r--	2024-03-10 20:38
delayed_call.h	709 B	-rw-r--r--	2024-03-10 20:38
dev_printk.h	9.65 KB	-rw-r--r--	2026-07-01 19:48
devcoredump.h	2.21 KB	-rw-r--r--	2024-03-10 20:38
devfreq-event.h	5.95 KB	-rw-r--r--	2024-03-10 20:38
devfreq.h	14.52 KB	-rw-r--r--	2024-03-10 20:38
devfreq_cooling.h	2.7 KB	-rw-r--r--	2024-03-10 20:38
device-mapper.h	20.22 KB	-rw-r--r--	2024-03-10 20:38
device.h	44.36 KB	-rw-r--r--	2026-07-01 19:48
device_cgroup.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
devm-helpers.h	2.68 KB	-rw-r--r--	2024-03-10 20:38
devpts_fs.h	1.13 KB	-rw-r--r--	2024-03-10 20:38
dfl.h	2.72 KB	-rw-r--r--	2024-03-10 20:38
digsig.h	1.18 KB	-rw-r--r--	2024-03-10 20:38
dim.h	9.2 KB	-rw-r--r--	2024-03-10 20:38
dio.h	10.76 KB	-rw-r--r--	2024-03-10 20:38
dirent.h	215 B	-rw-r--r--	2024-03-10 20:38
dlm.h	5.62 KB	-rw-r--r--	2024-03-10 20:38
dlm_plock.h	642 B	-rw-r--r--	2024-03-10 20:38
dm-bufio.h	4.9 KB	-rw-r--r--	2024-03-10 20:38
dm-dirty-log.h	4 KB	-rw-r--r--	2024-03-10 20:38
dm-io.h	2.03 KB	-rw-r--r--	2026-07-01 19:48
dm-kcopyd.h	3.03 KB	-rw-r--r--	2024-03-10 20:38
dm-region-hash.h	3.16 KB	-rw-r--r--	2024-03-10 20:38
dm-verity-loadpin.h	617 B	-rw-r--r--	2024-03-10 20:38
dm9000.h	987 B	-rw-r--r--	2024-03-10 20:38
dma-buf.h	21.17 KB	-rw-r--r--	2024-03-10 20:38
dma-direct.h	3.62 KB	-rw-r--r--	2024-03-10 20:38
dma-direction.h	407 B	-rw-r--r--	2024-03-10 20:38
dma-fence-array.h	2.53 KB	-rw-r--r--	2024-03-10 20:38
dma-fence-chain.h	3.49 KB	-rw-r--r--	2024-03-10 20:38
dma-fence-unwrap.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
dma-fence.h	22.67 KB	-rw-r--r--	2024-03-10 20:38
dma-heap.h	1.58 KB	-rw-r--r--	2024-03-10 20:38
dma-map-ops.h	16.73 KB	-rw-r--r--	2024-03-10 20:38
dma-mapping.h	20.25 KB	-rw-r--r--	2026-07-01 19:48
dma-resv.h	16.94 KB	-rw-r--r--	2024-03-10 20:38
dmaengine.h	53.73 KB	-rw-r--r--	2024-03-10 20:38
dmapool.h	1.79 KB	-rw-r--r--	2024-03-10 20:38
dmar.h	8.11 KB	-rw-r--r--	2024-03-10 20:38
dmi.h	4.41 KB	-rw-r--r--	2026-07-01 19:48
dnotify.h	1012 B	-rw-r--r--	2024-03-10 20:38
dns_resolver.h	1.36 KB	-rw-r--r--	2024-03-10 20:38
dpll.h	6.56 KB	-rw-r--r--	2026-07-01 19:48
dqblk_qtree.h	2.19 KB	-rw-r--r--	2024-03-10 20:38
dqblk_v1.h	327 B	-rw-r--r--	2024-03-10 20:38
dqblk_v2.h	406 B	-rw-r--r--	2024-03-10 20:38
drbd.h	9.92 KB	-rw-r--r--	2024-03-10 20:38
drbd_config.h	285 B	-rw-r--r--	2024-03-10 20:38
drbd_genl.h	21.49 KB	-rw-r--r--	2024-03-10 20:38
drbd_genl_api.h	1.76 KB	-rw-r--r--	2024-03-10 20:38
drbd_limits.h	7.92 KB	-rw-r--r--	2024-03-10 20:38
ds2782_battery.h	158 B	-rw-r--r--	2024-03-10 20:38
dtlk.h	3.5 KB	-rw-r--r--	2024-03-10 20:38
dtpm.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
dw_apb_timer.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
dynamic_debug.h	11 KB	-rw-r--r--	2024-03-10 20:38
dynamic_queue_limits.h	3.74 KB	-rw-r--r--	2026-07-01 19:48
earlycpio.h	359 B	-rw-r--r--	2024-03-10 20:38
ecryptfs.h	3.82 KB	-rw-r--r--	2024-03-10 20:38
edac.h	19.44 KB	-rw-r--r--	2024-03-10 20:38
edd.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
eeprom_93cx6.h	2.64 KB	-rw-r--r--	2026-07-01 19:48
eeprom_93xx46.h	1.04 KB	-rw-r--r--	2024-03-10 20:38
efi-bgrt.h	644 B	-rw-r--r--	2024-03-10 20:38
efi.h	45.27 KB	-rw-r--r--	2026-07-01 19:48
efi_embedded_fw.h	1.04 KB	-rw-r--r--	2024-03-10 20:38
efs_vh.h	1.55 KB	-rw-r--r--	2024-03-10 20:38
eisa.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
elf-fdpic.h	2.39 KB	-rw-r--r--	2024-03-10 20:38
elf-randomize.h	583 B	-rw-r--r--	2024-03-10 20:38
elf.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
elfcore-compat.h	1.43 KB	-rw-r--r--	2024-03-10 20:38
elfcore.h	3.93 KB	-rw-r--r--	2024-03-10 20:38
elfnote-lto.h	314 B	-rw-r--r--	2024-03-10 20:38
elfnote.h	3.54 KB	-rw-r--r--	2024-03-10 20:38
enclosure.h	4.02 KB	-rw-r--r--	2024-03-10 20:38
energy_model.h	11.54 KB	-rw-r--r--	2024-03-10 20:38
entry-common.h	18.58 KB	-rw-r--r--	2024-03-10 20:38
entry-kvm.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
err.h	2.94 KB	-rw-r--r--	2026-07-01 19:48
errname.h	283 B	-rw-r--r--	2024-03-10 20:38
errno.h	1.45 KB	-rw-r--r--	2024-03-10 20:38
error-injection.h	630 B	-rw-r--r--	2024-03-10 20:38
errqueue.h	524 B	-rw-r--r--	2024-03-10 20:38
errseq.h	382 B	-rw-r--r--	2024-03-10 20:38
etherdevice.h	19.27 KB	-rw-r--r--	2026-07-01 19:48
ethtool.h	43.95 KB	-rw-r--r--	2026-07-01 19:48
ethtool_netlink.h	3.25 KB	-rw-r--r--	2024-03-10 20:38
eventfd.h	2.1 KB	-rw-r--r--	2024-03-10 20:38
eventpoll.h	2.41 KB	-rw-r--r--	2026-07-01 19:48
evm.h	4.91 KB	-rw-r--r--	2024-03-10 20:38
export-internal.h	2.3 KB	-rw-r--r--	2024-03-10 20:38
export.h	2.21 KB	-rw-r--r--	2026-07-01 19:48
exportfs.h	10.21 KB	-rw-r--r--	2024-03-10 20:38
ext2_fs.h	967 B	-rw-r--r--	2024-03-10 20:38
extable.h	1.28 KB	-rw-r--r--	2024-03-10 20:38
extcon-provider.h	3.83 KB	-rw-r--r--	2024-03-10 20:38
extcon.h	9.99 KB	-rw-r--r--	2024-03-10 20:38
f2fs_fs.h	20.13 KB	-rw-r--r--	2026-07-01 19:48
f75375s.h	541 B	-rw-r--r--	2024-03-10 20:38
falloc.h	1.79 KB	-rw-r--r--	2026-07-01 19:48
fanotify.h	4.67 KB	-rw-r--r--	2026-07-01 19:48
fault-inject-usercopy.h	496 B	-rw-r--r--	2024-03-10 20:38
fault-inject.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
fb.h	29.42 KB	-rw-r--r--	2026-07-01 19:48
fbcon.h	2.2 KB	-rw-r--r--	2026-07-01 19:48
fcdevice.h	774 B	-rw-r--r--	2024-03-10 20:38
fcntl.h	1.66 KB	-rw-r--r--	2024-03-10 20:38
fd.h	490 B	-rw-r--r--	2024-03-10 20:38
fddidevice.h	833 B	-rw-r--r--	2024-03-10 20:38
fdtable.h	3.46 KB	-rw-r--r--	2026-07-01 19:48
fec.h	463 B	-rw-r--r--	2024-03-10 20:38
fiemap.h	713 B	-rw-r--r--	2024-03-10 20:38
file.h	3.19 KB	-rw-r--r--	2026-07-01 19:48
fileattr.h	1.9 KB	-rw-r--r--	2024-03-10 20:38
filelock.h	11.44 KB	-rw-r--r--	2024-03-10 20:38
filter.h	45.03 KB	-rw-r--r--	2026-07-01 19:48
find.h	19.62 KB	-rw-r--r--	2024-03-10 20:38
fips.h	303 B	-rw-r--r--	2024-03-10 20:38
firewire.h	16.41 KB	-rw-r--r--	2024-03-10 20:38
firmware-map.h	959 B	-rw-r--r--	2024-03-10 20:38
firmware.h	5.81 KB	-rw-r--r--	2024-03-10 20:38
fixp-arith.h	4.21 KB	-rw-r--r--	2024-03-10 20:38
flat.h	2.57 KB	-rw-r--r--	2024-03-10 20:38
flex_proportions.h	2.83 KB	-rw-r--r--	2024-03-10 20:38
font.h	1.67 KB	-rw-r--r--	2024-03-10 20:38
fortify-string.h	26.73 KB	-rw-r--r--	2026-07-01 19:48
fprobe.h	3.15 KB	-rw-r--r--	2024-03-10 20:38
freezer.h	2.34 KB	-rw-r--r--	2024-03-10 20:38
fs.h	117.06 KB	-rw-r--r--	2026-07-01 19:48
fs_api.h	22 B	-rw-r--r--	2024-03-10 20:38
fs_context.h	8.18 KB	-rw-r--r--	2026-07-01 19:48
fs_parser.h	4.67 KB	-rw-r--r--	2026-07-01 19:48
fs_pin.h	539 B	-rw-r--r--	2024-03-10 20:38
fs_stack.h	895 B	-rw-r--r--	2024-03-10 20:38
fs_struct.h	1.04 KB	-rw-r--r--	2024-03-10 20:38
fs_types.h	2.02 KB	-rw-r--r--	2024-03-10 20:38
fscache-cache.h	7.09 KB	-rw-r--r--	2026-07-01 19:48
fscache.h	23.85 KB	-rw-r--r--	2024-03-10 20:38
fscrypt.h	32.98 KB	-rw-r--r--	2024-03-10 20:38
fsi-occ.h	715 B	-rw-r--r--	2024-03-10 20:38
fsi-sbefifo.h	629 B	-rw-r--r--	2024-03-10 20:38
fsi.h	2.26 KB	-rw-r--r--	2024-03-10 20:38
fsl-diu-fb.h	3.87 KB	-rw-r--r--	2024-03-10 20:38
fsl_devices.h	4.16 KB	-rw-r--r--	2024-03-10 20:38
fsl_hypervisor.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
fsl_ifc.h	24.48 KB	-rw-r--r--	2024-03-10 20:38
fsldma.h	202 B	-rw-r--r--	2024-03-10 20:38
fsnotify.h	10.93 KB	-rw-r--r--	2026-07-01 19:48
fsnotify_backend.h	29.13 KB	-rw-r--r--	2026-07-01 19:48
fsverity.h	9.29 KB	-rw-r--r--	2024-03-10 20:38
ftrace.h	38.74 KB	-rw-r--r--	2026-07-01 19:48
ftrace_irq.h	884 B	-rw-r--r--	2024-03-10 20:38
futex.h	2.44 KB	-rw-r--r--	2024-03-10 20:38
fw_table.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
fwnode.h	8.12 KB	-rw-r--r--	2026-07-01 19:48
fwnode_mdio.h	858 B	-rw-r--r--	2024-03-10 20:38
gameport.h	5.24 KB	-rw-r--r--	2024-03-10 20:38
gcd.h	193 B	-rw-r--r--	2024-03-10 20:38
genalloc.h	7.73 KB	-rw-r--r--	2026-07-01 19:48
generic-radix-tree.h	8.33 KB	-rw-r--r--	2024-03-10 20:38
genetlink.h	589 B	-rw-r--r--	2024-03-10 20:38
genl_magic_func.h	11.67 KB	-rw-r--r--	2024-03-10 20:38
genl_magic_struct.h	7.58 KB	-rw-r--r--	2024-03-10 20:38
getcpu.h	641 B	-rw-r--r--	2024-03-10 20:38
gfp.h	12.06 KB	-rw-r--r--	2026-07-01 19:48
gfp_api.h	23 B	-rw-r--r--	2024-03-10 20:38
gfp_types.h	14.98 KB	-rw-r--r--	2026-07-01 19:48
glob.h	256 B	-rw-r--r--	2024-03-10 20:38
gnss.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
goldfish.h	878 B	-rw-r--r--	2024-03-10 20:38
gpio-pxa.h	571 B	-rw-r--r--	2024-03-10 20:38
gpio.h	5.44 KB	-rw-r--r--	2024-03-10 20:38
gpio_keys.h	1.81 KB	-rw-r--r--	2024-03-10 20:38
greybus.h	4.14 KB	-rw-r--r--	2024-03-10 20:38
group_cpus.h	310 B	-rw-r--r--	2024-03-10 20:38
hardirq.h	3.25 KB	-rw-r--r--	2024-03-10 20:38
hash.h	2.93 KB	-rw-r--r--	2024-03-10 20:38
hashtable.h	6.67 KB	-rw-r--r--	2024-03-10 20:38
hashtable_api.h	29 B	-rw-r--r--	2024-03-10 20:38
hdlc.h	3.19 KB	-rw-r--r--	2024-03-10 20:38
hdlcdrv.h	6.32 KB	-rw-r--r--	2024-03-10 20:38
hdmi.h	12.55 KB	-rw-r--r--	2024-03-10 20:38
hex.h	884 B	-rw-r--r--	2024-03-10 20:38
hid-debug.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
hid-roccat.h	490 B	-rw-r--r--	2024-03-10 20:38
hid-sensor-hub.h	8.97 KB	-rw-r--r--	2024-03-10 20:38
hid-sensor-ids.h	7.49 KB	-rw-r--r--	2024-03-10 20:38
hid.h	38.89 KB	-rw-r--r--	2026-07-01 19:48
hid_bpf.h	5.24 KB	-rw-r--r--	2024-03-10 20:38
hidden.h	966 B	-rw-r--r--	2024-03-10 20:38
hiddev.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
hidraw.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
highmem-internal.h	6.74 KB	-rw-r--r--	2024-03-10 20:38
highmem.h	18.04 KB	-rw-r--r--	2026-07-01 19:48
highuid.h	3.12 KB	-rw-r--r--	2024-03-10 20:38
hil.h	18.42 KB	-rw-r--r--	2024-03-10 20:38
hil_mlc.h	5.13 KB	-rw-r--r--	2024-03-10 20:38
hippidevice.h	1.08 KB	-rw-r--r--	2024-03-10 20:38
hisi_acc_qm.h	14.04 KB	-rw-r--r--	2026-07-01 19:48
hmm.h	3.93 KB	-rw-r--r--	2024-03-10 20:38
host1x.h	13.49 KB	-rw-r--r--	2024-03-10 20:38
host1x_context_bus.h	331 B	-rw-r--r--	2024-03-10 20:38
hp_sdc.h	14.01 KB	-rw-r--r--	2024-03-10 20:38
hpet.h	2.55 KB	-rw-r--r--	2024-03-10 20:38
hrtimer.h	14.87 KB	-rw-r--r--	2026-07-01 19:48
hrtimer_api.h	27 B	-rw-r--r--	2024-03-10 20:38
hrtimer_defs.h	660 B	-rw-r--r--	2024-03-10 20:38
hrtimer_types.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
hte.h	7.37 KB	-rw-r--r--	2024-03-10 20:38
huge_mm.h	16.06 KB	-rw-r--r--	2026-07-01 19:48
hugetlb.h	35.76 KB	-rw-r--r--	2026-07-01 19:48
hugetlb_cgroup.h	6.78 KB	-rw-r--r--	2024-03-10 20:38
hugetlb_inline.h	374 B	-rw-r--r--	2024-03-10 20:38
hw_breakpoint.h	4.19 KB	-rw-r--r--	2024-03-10 20:38
hw_random.h	2.25 KB	-rw-r--r--	2024-03-10 20:38
hwmon-sysfs.h	2.8 KB	-rw-r--r--	2024-03-10 20:38
hwmon-vid.h	862 B	-rw-r--r--	2024-03-10 20:38
hwmon.h	15.58 KB	-rw-r--r--	2024-03-10 20:38
hwspinlock.h	15.79 KB	-rw-r--r--	2026-07-01 19:48
hyperv.h	49.49 KB	-rw-r--r--	2026-07-01 19:48
hypervisor.h	799 B	-rw-r--r--	2026-07-01 19:48
i2c-algo-bit.h	1.4 KB	-rw-r--r--	2024-03-10 20:38
i2c-algo-pca.h	2.89 KB	-rw-r--r--	2024-03-10 20:38
i2c-algo-pcf.h	1.21 KB	-rw-r--r--	2024-03-10 20:38
i2c-atr.h	3.95 KB	-rw-r--r--	2024-03-10 20:38
i2c-dev.h	371 B	-rw-r--r--	2024-03-10 20:38
i2c-mux.h	1.63 KB	-rw-r--r--	2024-03-10 20:38
i2c-smbus.h	1.52 KB	-rw-r--r--	2024-03-10 20:38
i2c.h	39.03 KB	-rw-r--r--	2026-07-01 19:48
i8042.h	2.02 KB	-rw-r--r--	2024-03-10 20:38
i8253.h	808 B	-rw-r--r--	2026-07-01 19:48
i8254.h	489 B	-rw-r--r--	2024-03-10 20:38
icmp.h	1 KB	-rw-r--r--	2024-03-10 20:38
icmpv6.h	2.87 KB	-rw-r--r--	2024-03-10 20:38
idle_inject.h	1.02 KB	-rw-r--r--	2024-03-10 20:38
idr.h	9.72 KB	-rw-r--r--	2024-03-10 20:38
ieee80211.h	168.2 KB	-rw-r--r--	2026-07-01 19:48
ieee802154.h	14.46 KB	-rw-r--r--	2024-03-10 20:38
if_arp.h	1.81 KB	-rw-r--r--	2024-03-10 20:38
if_bridge.h	5.42 KB	-rw-r--r--	2026-07-01 19:48
if_eql.h	1.13 KB	-rw-r--r--	2024-03-10 20:38
if_ether.h	1.3 KB	-rw-r--r--	2026-07-01 19:48
if_fddi.h	3.24 KB	-rw-r--r--	2024-03-10 20:38
if_hsr.h	1.07 KB	-rw-r--r--	2024-03-10 20:38
if_link.h	592 B	-rw-r--r--	2024-03-10 20:38
if_ltalk.h	188 B	-rw-r--r--	2024-03-10 20:38
if_macvlan.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
if_phonet.h	319 B	-rw-r--r--	2024-03-10 20:38
if_pppol2tp.h	501 B	-rw-r--r--	2024-03-10 20:38
if_pppox.h	2.83 KB	-rw-r--r--	2024-03-10 20:38
if_rmnet.h	2.06 KB	-rw-r--r--	2024-03-10 20:38
if_tap.h	2.21 KB	-rw-r--r--	2024-03-10 20:38
if_team.h	7.94 KB	-rw-r--r--	2024-03-10 20:38
if_tun.h	1.55 KB	-rw-r--r--	2024-03-10 20:38
if_tunnel.h	409 B	-rw-r--r--	2024-03-10 20:38
if_vlan.h	21.92 KB	-rw-r--r--	2026-07-01 19:48
igmp.h	4.36 KB	-rw-r--r--	2024-03-10 20:38
ihex.h	2.15 KB	-rw-r--r--	2024-03-10 20:38
ima.h	6.67 KB	-rw-r--r--	2026-07-01 19:48
imx-media.h	605 B	-rw-r--r--	2024-03-10 20:38
in.h	2.29 KB	-rw-r--r--	2024-03-10 20:38
in6.h	1.63 KB	-rw-r--r--	2024-03-10 20:38
indirect_call_wrapper.h	2.38 KB	-rw-r--r--	2026-07-01 19:48
inet.h	2.64 KB	-rw-r--r--	2024-03-10 20:38
inet_diag.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
inetdevice.h	9.02 KB	-rw-r--r--	2026-07-01 19:48
init.h	12.28 KB	-rw-r--r--	2026-07-01 19:48
init_ohci1394_dma.h	196 B	-rw-r--r--	2024-03-10 20:38
init_syscalls.h	1.01 KB	-rw-r--r--	2024-03-10 20:38
init_task.h	1.1 KB	-rw-r--r--	2024-03-10 20:38
initrd.h	1008 B	-rw-r--r--	2024-03-10 20:38
inotify.h	628 B	-rw-r--r--	2024-03-10 20:38
input.h	20.03 KB	-rw-r--r--	2024-03-10 20:38
instruction_pointer.h	346 B	-rw-r--r--	2024-03-10 20:38
instrumentation.h	1.96 KB	-rw-r--r--	2024-03-10 20:38
instrumented.h	5.15 KB	-rw-r--r--	2024-03-10 20:38
int_log.h	1.26 KB	-rw-r--r--	2024-03-10 20:38
integrity.h	1.15 KB	-rw-r--r--	2024-03-10 20:38
intel-ish-client-if.h	4.29 KB	-rw-r--r--	2026-07-01 19:48
intel_rapl.h	5.01 KB	-rw-r--r--	2026-07-01 19:48
intel_tcc.h	466 B	-rw-r--r--	2026-07-01 19:48
intel_th.h	2.44 KB	-rw-r--r--	2024-03-10 20:38
intel_tpmi.h	1.64 KB	-rw-r--r--	2024-03-10 20:38
interconnect-clk.h	466 B	-rw-r--r--	2024-03-10 20:38
interconnect-provider.h	5.5 KB	-rw-r--r--	2024-03-10 20:38
interconnect.h	3.36 KB	-rw-r--r--	2024-03-10 20:38
interrupt.h	25.4 KB	-rw-r--r--	2026-07-01 19:48
interval_tree.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
interval_tree_generic.h	6.7 KB	-rw-r--r--	2024-03-10 20:38
io-64-nonatomic-hi-lo.h	2.41 KB	-rw-r--r--	2024-03-10 20:38
io-64-nonatomic-lo-hi.h	2.41 KB	-rw-r--r--	2024-03-10 20:38
io-mapping.h	4.69 KB	-rw-r--r--	2024-03-10 20:38
io-pgtable.h	9.58 KB	-rw-r--r--	2024-03-10 20:38
io.h	5.2 KB	-rw-r--r--	2026-07-01 19:48
io_uring.h	1.23 KB	-rw-r--r--	2026-07-01 19:48
io_uring_types.h	17.46 KB	-rw-r--r--	2026-07-01 19:48
ioam6.h	226 B	-rw-r--r--	2024-03-10 20:38
ioam6_genl.h	266 B	-rw-r--r--	2024-03-10 20:38
ioam6_iptunnel.h	285 B	-rw-r--r--	2024-03-10 20:38
iocontext.h	4.16 KB	-rw-r--r--	2024-03-10 20:38
iomap.h	14.46 KB	-rw-r--r--	2026-07-01 19:48
iommu-helper.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
iommu.h	47.63 KB	-rw-r--r--	2026-07-01 19:48
iommufd.h	3.5 KB	-rw-r--r--	2024-03-10 20:38
iopoll.h	7.98 KB	-rw-r--r--	2024-03-10 20:38
ioport.h	13.83 KB	-rw-r--r--	2026-07-01 19:48
ioprio.h	2.17 KB	-rw-r--r--	2026-07-01 19:48
ioremap.h	719 B	-rw-r--r--	2024-03-10 20:38
iosys-map.h	16.73 KB	-rw-r--r--	2026-07-01 19:48
iov_iter.h	7.12 KB	-rw-r--r--	2024-03-10 20:38
iova.h	4.08 KB	-rw-r--r--	2024-03-10 20:38
iova_bitmap.h	1.31 KB	-rw-r--r--	2024-03-10 20:38
ip.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
ipack.h	8.69 KB	-rw-r--r--	2024-03-10 20:38
ipc.h	619 B	-rw-r--r--	2024-03-10 20:38
ipc_namespace.h	5.63 KB	-rw-r--r--	2026-07-01 19:48
ipmi.h	11.09 KB	-rw-r--r--	2024-03-10 20:38
ipmi_smi.h	9.83 KB	-rw-r--r--	2024-03-10 20:38
ipv6.h	8.01 KB	-rw-r--r--	2024-03-10 20:38
ipv6_route.h	372 B	-rw-r--r--	2024-03-10 20:38
irq.h	42.29 KB	-rw-r--r--	2026-07-01 19:48
irq_poll.h	575 B	-rw-r--r--	2024-03-10 20:38
irq_sim.h	789 B	-rw-r--r--	2024-03-10 20:38
irq_work.h	2.04 KB	-rw-r--r--	2024-03-10 20:38
irqbypass.h	3.45 KB	-rw-r--r--	2024-03-10 20:38
irqchip.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
irqdesc.h	7.81 KB	-rw-r--r--	2024-03-10 20:38
irqdomain.h	20.39 KB	-rw-r--r--	2024-03-10 20:38
irqdomain_defs.h	820 B	-rw-r--r--	2024-03-10 20:38
irqflags.h	7.75 KB	-rw-r--r--	2026-07-01 19:48
irqflags_types.h	563 B	-rw-r--r--	2024-03-10 20:38
irqhandler.h	300 B	-rw-r--r--	2024-03-10 20:38
irqnr.h	856 B	-rw-r--r--	2024-03-10 20:38
irqreturn.h	529 B	-rw-r--r--	2024-03-10 20:38
isa-dma.h	276 B	-rw-r--r--	2024-03-10 20:38
isa.h	3.33 KB	-rw-r--r--	2024-03-10 20:38
isapnp.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
iscsi_boot_sysfs.h	3.71 KB	-rw-r--r--	2024-03-10 20:38
iscsi_ibft.h	994 B	-rw-r--r--	2024-03-10 20:38
ism.h	2.2 KB	-rw-r--r--	2026-07-01 19:48
iversion.h	10.96 KB	-rw-r--r--	2024-03-10 20:38
jbd2.h	51.7 KB	-rw-r--r--	2026-07-01 19:48
jhash.h	4.56 KB	-rw-r--r--	2024-03-10 20:38
jiffies.h	19.67 KB	-rw-r--r--	2026-07-01 19:48
journal-head.h	2.91 KB	-rw-r--r--	2024-03-10 20:38
joystick.h	437 B	-rw-r--r--	2024-03-10 20:38
jump_label.h	16.25 KB	-rw-r--r--	2024-03-10 20:38
jump_label_ratelimit.h	2.77 KB	-rw-r--r--	2024-03-10 20:38
jz4740-adc.h	1023 B	-rw-r--r--	2024-03-10 20:38
jz4780-nemc.h	976 B	-rw-r--r--	2024-03-10 20:38
kallsyms.h	4.26 KB	-rw-r--r--	2026-07-01 19:48
kasan-checks.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
kasan-enabled.h	639 B	-rw-r--r--	2024-03-10 20:38
kasan-tags.h	487 B	-rw-r--r--	2024-03-10 20:38
kasan.h	19.22 KB	-rw-r--r--	2026-07-01 19:48
kbd_diacr.h	198 B	-rw-r--r--	2024-03-10 20:38
kbd_kern.h	3.6 KB	-rw-r--r--	2024-03-10 20:38
kbuild.h	380 B	-rw-r--r--	2024-03-10 20:38
kconfig.h	2.63 KB	-rw-r--r--	2024-03-10 20:38
kcore.h	891 B	-rw-r--r--	2024-03-10 20:38
kcov.h	3.16 KB	-rw-r--r--	2026-07-01 19:48
kcsan-checks.h	18.63 KB	-rw-r--r--	2024-03-10 20:38
kcsan.h	2.19 KB	-rw-r--r--	2024-03-10 20:38
kdb.h	7.43 KB	-rw-r--r--	2024-03-10 20:38
kdebug.h	487 B	-rw-r--r--	2024-03-10 20:38
kdev_t.h	1.8 KB	-rw-r--r--	2024-03-10 20:38
kern_levels.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
kernel-page-flags.h	551 B	-rw-r--r--	2024-03-10 20:38
kernel.h	14.07 KB	-rw-r--r--	2024-03-10 20:38
kernel_read_file.h	1.62 KB	-rw-r--r--	2024-03-10 20:38
kernel_stat.h	3.37 KB	-rw-r--r--	2024-03-10 20:38
kernelcapi.h	1.45 KB	-rw-r--r--	2024-03-10 20:38
kernfs.h	19.49 KB	-rw-r--r--	2026-07-01 19:48
kexec.h	14.09 KB	-rw-r--r--	2026-07-01 19:48
key-type.h	6.63 KB	-rw-r--r--	2024-03-10 20:38
key.h	16.05 KB	-rw-r--r--	2024-03-10 20:38
keyboard.h	665 B	-rw-r--r--	2024-03-10 20:38
keyctl.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
kfence.h	8.72 KB	-rw-r--r--	2026-07-01 19:48
kfifo.h	26.18 KB	-rw-r--r--	2024-03-10 20:38
kgdb.h	12.12 KB	-rw-r--r--	2024-03-10 20:38
khugepaged.h	1.77 KB	-rw-r--r--	2024-03-10 20:38
klist.h	1.88 KB	-rw-r--r--	2024-03-10 20:38
kmemleak.h	3.12 KB	-rw-r--r--	2024-03-10 20:38
kmod.h	1.02 KB	-rw-r--r--	2024-03-10 20:38
kmsan-checks.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
kmsan.h	9.24 KB	-rw-r--r--	2024-03-10 20:38
kmsan_string.h	681 B	-rw-r--r--	2024-03-10 20:38
kmsan_types.h	908 B	-rw-r--r--	2024-03-10 20:38
kmsg_dump.h	2.71 KB	-rw-r--r--	2024-03-10 20:38
kobj_map.h	545 B	-rw-r--r--	2024-03-10 20:38
kobject.h	6.95 KB	-rw-r--r--	2024-03-10 20:38
kobject_api.h	27 B	-rw-r--r--	2024-03-10 20:38
kobject_ns.h	1.91 KB	-rw-r--r--	2024-03-10 20:38
kprobes.h	16.45 KB	-rw-r--r--	2026-07-01 19:48
kref.h	3.08 KB	-rw-r--r--	2024-03-10 20:38
kref_api.h	24 B	-rw-r--r--	2024-03-10 20:38
ks0108.h	970 B	-rw-r--r--	2024-03-10 20:38
ks8842.h	632 B	-rw-r--r--	2024-03-10 20:38
ks8851_mll.h	472 B	-rw-r--r--	2024-03-10 20:38
ksm.h	4.31 KB	-rw-r--r--	2026-07-01 19:48
kstrtox.h	6.51 KB	-rw-r--r--	2024-03-10 20:38
kthread.h	7 KB	-rw-r--r--	2024-03-10 20:38
ktime.h	5.33 KB	-rw-r--r--	2024-03-10 20:38
ktime_api.h	25 B	-rw-r--r--	2024-03-10 20:38
kvm_dirty_ring.h	2.68 KB	-rw-r--r--	2024-03-10 20:38
kvm_host.h	73.35 KB	-rw-r--r--	2026-07-01 19:48
kvm_irqfd.h	1.99 KB	-rw-r--r--	2024-03-10 20:38
kvm_para.h	402 B	-rw-r--r--	2024-03-10 20:38
kvm_types.h	2.79 KB	-rw-r--r--	2024-03-10 20:38
l2tp.h	261 B	-rw-r--r--	2024-03-10 20:38
lantiq.h	365 B	-rw-r--r--	2024-03-10 20:38
lapb.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
latencytop.h	1.06 KB	-rw-r--r--	2024-03-10 20:38
lcd.h	3.78 KB	-rw-r--r--	2024-03-10 20:38
lcm.h	275 B	-rw-r--r--	2024-03-10 20:38
led-class-flash.h	6.74 KB	-rw-r--r--	2024-03-10 20:38
led-class-multicolor.h	3.26 KB	-rw-r--r--	2024-03-10 20:38
led-lm3530.h	3.7 KB	-rw-r--r--	2024-03-10 20:38
leds-bd2802.h	476 B	-rw-r--r--	2024-03-10 20:38
leds-lp3944.h	950 B	-rw-r--r--	2024-03-10 20:38
leds-lp3952.h	2.35 KB	-rw-r--r--	2024-03-10 20:38
leds-pca9532.h	866 B	-rw-r--r--	2024-03-10 20:38
leds-regulator.h	1.14 KB	-rw-r--r--	2024-03-10 20:38
leds-ti-lmu-common.h	1.12 KB	-rw-r--r--	2024-03-10 20:38
leds.h	22.56 KB	-rw-r--r--	2026-07-01 19:48
libata.h	68.03 KB	-rw-r--r--	2026-07-01 19:48
libfdt.h	202 B	-rw-r--r--	2024-03-10 20:38
libfdt_env.h	491 B	-rw-r--r--	2024-03-10 20:38
libgcc.h	810 B	-rw-r--r--	2024-03-10 20:38
libnvdimm.h	9.93 KB	-rw-r--r--	2024-03-10 20:38
libps2.h	2.47 KB	-rw-r--r--	2024-03-10 20:38
license.h	418 B	-rw-r--r--	2024-03-10 20:38
limits.h	809 B	-rw-r--r--	2024-03-10 20:38
linear_range.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
linkage.h	9.56 KB	-rw-r--r--	2024-03-10 20:38
linkmode.h	2.5 KB	-rw-r--r--	2024-03-10 20:38
linux_logo.h	1.91 KB	-rw-r--r--	2024-03-10 20:38
lis3lv02d.h	5 KB	-rw-r--r--	2024-03-10 20:38
list.h	35.11 KB	-rw-r--r--	2024-03-10 20:38
list_bl.h	4.79 KB	-rw-r--r--	2024-03-10 20:38
list_lru.h	9.12 KB	-rw-r--r--	2024-03-10 20:38
list_nulls.h	4.22 KB	-rw-r--r--	2024-03-10 20:38
list_sort.h	374 B	-rw-r--r--	2024-03-10 20:38
litex.h	2.06 KB	-rw-r--r--	2024-03-10 20:38
livepatch.h	8.23 KB	-rw-r--r--	2024-03-10 20:38
livepatch_sched.h	802 B	-rw-r--r--	2024-03-10 20:38
llc.h	749 B	-rw-r--r--	2024-03-10 20:38
llist.h	10.43 KB	-rw-r--r--	2024-03-10 20:38
llist_api.h	25 B	-rw-r--r--	2024-03-10 20:38
local_lock.h	1.33 KB	-rw-r--r--	2024-03-10 20:38
local_lock_internal.h	3.42 KB	-rw-r--r--	2024-03-10 20:38
lockdep.h	20.16 KB	-rw-r--r--	2026-07-01 19:48
lockdep_api.h	27 B	-rw-r--r--	2024-03-10 20:38
lockdep_types.h	7.56 KB	-rw-r--r--	2024-03-10 20:38
lockref.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
log2.h	6.23 KB	-rw-r--r--	2024-03-10 20:38
logic_iomem.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
logic_pio.h	3.09 KB	-rw-r--r--	2024-03-10 20:38
lp.h	2.76 KB	-rw-r--r--	2024-03-10 20:38
lru_cache.h	11.66 KB	-rw-r--r--	2024-03-10 20:38
lsm_audit.h	2.87 KB	-rw-r--r--	2024-03-10 20:38
lsm_hook_defs.h	22.43 KB	-rw-r--r--	2026-07-01 19:48
lsm_hooks.h	4.84 KB	-rw-r--r--	2026-07-01 19:48
lwq.h	3.69 KB	-rw-r--r--	2024-03-10 20:38
lz4.h	26.44 KB	-rw-r--r--	2024-03-10 20:38
lzo.h	1.93 KB	-rw-r--r--	2026-07-01 19:48
mISDNdsp.h	1.19 KB	-rw-r--r--	2024-03-10 20:38
mISDNhw.h	5.39 KB	-rw-r--r--	2024-03-10 20:38
mISDNif.h	14.9 KB	-rw-r--r--	2024-03-10 20:38
mailbox_client.h	1.78 KB	-rw-r--r--	2026-07-01 19:48
mailbox_controller.h	5.88 KB	-rw-r--r--	2026-07-01 19:48
map_benchmark.h	1.11 KB	-rw-r--r--	2026-07-01 19:48
maple.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
maple_tree.h	28.19 KB	-rw-r--r--	2026-07-01 19:48
marvell_phy.h	1.74 KB	-rw-r--r--	2024-03-10 20:38
math.h	6.27 KB	-rw-r--r--	2026-07-01 19:48
math64.h	8.28 KB	-rw-r--r--	2024-03-10 20:38
mbcache.h	2.09 KB	-rw-r--r--	2024-03-10 20:38
mbus.h	3.09 KB	-rw-r--r--	2024-03-10 20:38
mc146818rtc.h	4.72 KB	-rw-r--r--	2024-03-10 20:38
mc6821.h	1.18 KB	-rw-r--r--	2024-03-10 20:38
mcb.h	3.67 KB	-rw-r--r--	2024-03-10 20:38
mdev.h	2.36 KB	-rw-r--r--	2024-03-10 20:38
mdio-bitbang.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
mdio-gpio.h	177 B	-rw-r--r--	2024-03-10 20:38
mdio-mux.h	1021 B	-rw-r--r--	2024-03-10 20:38
mdio.h	21.24 KB	-rw-r--r--	2026-07-01 19:48
mei_aux.h	929 B	-rw-r--r--	2024-03-10 20:38
mei_cl_bus.h	4.6 KB	-rw-r--r--	2024-03-10 20:38
mem_encrypt.h	780 B	-rw-r--r--	2024-03-10 20:38
memblock.h	21.04 KB	-rw-r--r--	2024-03-10 20:38
memcontrol.h	47.92 KB	-rw-r--r--	2026-07-01 19:48
memfd.h	717 B	-rw-r--r--	2026-07-01 19:48
memory-tiers.h	3.5 KB	-rw-r--r--	2026-07-01 19:48
memory.h	6.39 KB	-rw-r--r--	2026-07-01 19:48
memory_hotplug.h	11.84 KB	-rw-r--r--	2026-07-01 19:48
mempolicy.h	7.25 KB	-rw-r--r--	2026-07-01 19:48
mempool.h	3.52 KB	-rw-r--r--	2024-03-10 20:38
memregion.h	1.8 KB	-rw-r--r--	2024-03-10 20:38
memremap.h	7.67 KB	-rw-r--r--	2026-07-01 19:48
memstick.h	9.6 KB	-rw-r--r--	2024-03-10 20:38
mhi.h	26.78 KB	-rw-r--r--	2024-03-10 20:38
mhi_ep.h	10.63 KB	-rw-r--r--	2024-03-10 20:38
micrel_phy.h	2.13 KB	-rw-r--r--	2024-03-10 20:38
microchipphy.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
migrate.h	7.81 KB	-rw-r--r--	2026-07-01 19:48
migrate_mode.h	985 B	-rw-r--r--	2024-03-10 20:38
mii.h	15.49 KB	-rw-r--r--	2024-03-10 20:38
mii_timestamper.h	3.66 KB	-rw-r--r--	2024-03-10 20:38
min_heap.h	3.3 KB	-rw-r--r--	2024-03-10 20:38
minmax.h	10.05 KB	-rw-r--r--	2026-07-01 19:48
misc_cgroup.h	2.94 KB	-rw-r--r--	2024-03-10 20:38
miscdevice.h	3.21 KB	-rw-r--r--	2024-03-10 20:38
mm.h	129.25 KB	-rw-r--r--	2026-07-01 19:48
mm_api.h	22 B	-rw-r--r--	2024-03-10 20:38
mm_inline.h	16.7 KB	-rw-r--r--	2024-03-10 20:38
mm_types.h	45.26 KB	-rw-r--r--	2026-07-01 19:48
mm_types_task.h	1.9 KB	-rw-r--r--	2024-03-10 20:38
mman.h	5.48 KB	-rw-r--r--	2026-07-01 19:48
mmap_lock.h	5.04 KB	-rw-r--r--	2026-07-01 19:48
mmdebug.h	3.86 KB	-rw-r--r--	2026-07-01 19:48
mmiotrace.h	3.05 KB	-rw-r--r--	2024-03-10 20:38
mmu_context.h	1.06 KB	-rw-r--r--	2024-03-10 20:38
mmu_notifier.h	23.4 KB	-rw-r--r--	2024-03-10 20:38
mmzone.h	64.68 KB	-rw-r--r--	2026-07-01 19:48
mnt_idmapping.h	6.84 KB	-rw-r--r--	2024-03-10 20:38
mnt_namespace.h	627 B	-rw-r--r--	2024-03-10 20:38
mod_devicetable.h	25.17 KB	-rw-r--r--	2026-07-01 19:48
module.h	27.24 KB	-rw-r--r--	2026-07-01 19:48
module_signature.h	1.22 KB	-rw-r--r--	2024-03-10 20:38
module_symbol.h	409 B	-rw-r--r--	2024-03-10 20:38
moduleloader.h	4.21 KB	-rw-r--r--	2026-07-01 19:48
moduleparam.h	22.4 KB	-rw-r--r--	2026-07-01 19:48
most.h	12.2 KB	-rw-r--r--	2024-03-10 20:38
mount.h	4.29 KB	-rw-r--r--	2026-07-01 19:48
moxtet.h	2.33 KB	-rw-r--r--	2024-03-10 20:38
mpage.h	644 B	-rw-r--r--	2024-03-10 20:38
mpi.h	8.41 KB	-rw-r--r--	2024-03-10 20:38
mpls.h	394 B	-rw-r--r--	2024-03-10 20:38
mpls_iptunnel.h	178 B	-rw-r--r--	2024-03-10 20:38
mroute.h	2.12 KB	-rw-r--r--	2024-03-10 20:38
mroute6.h	2.93 KB	-rw-r--r--	2024-03-10 20:38
mroute_base.h	12.34 KB	-rw-r--r--	2026-07-01 19:48
msdos_fs.h	273 B	-rw-r--r--	2024-03-10 20:38
msdos_partition.h	1.62 KB	-rw-r--r--	2024-03-10 20:38
msg.h	395 B	-rw-r--r--	2024-03-10 20:38
msi.h	22.87 KB	-rw-r--r--	2026-07-01 19:48
msi_api.h	1.96 KB	-rw-r--r--	2024-03-10 20:38
mtio.h	1.29 KB	-rw-r--r--	2024-03-10 20:38
mutex.h	5.71 KB	-rw-r--r--	2026-07-01 19:48
mutex_api.h	25 B	-rw-r--r--	2024-03-10 20:38
mutex_types.h	2.09 KB	-rw-r--r--	2024-03-10 20:38
mv643xx.h	51.05 KB	-rw-r--r--	2024-03-10 20:38
mv643xx_eth.h	2 KB	-rw-r--r--	2024-03-10 20:38
mv643xx_i2c.h	335 B	-rw-r--r--	2024-03-10 20:38
mvebu-pmsu.h	520 B	-rw-r--r--	2024-03-10 20:38
mxm-wmi.h	399 B	-rw-r--r--	2024-03-10 20:38
namei.h	5.56 KB	-rw-r--r--	2024-03-10 20:38
nd.h	6.25 KB	-rw-r--r--	2024-03-10 20:38
ndctl.h	674 B	-rw-r--r--	2024-03-10 20:38
net.h	11.97 KB	-rw-r--r--	2026-07-01 19:48
net_tstamp.h	1.89 KB	-rw-r--r--	2024-03-10 20:38
netdev_features.h	11.56 KB	-rw-r--r--	2026-07-01 19:48
netdevice.h	167.47 KB	-rw-r--r--	2026-07-01 19:48
netfilter.h	14.25 KB	-rw-r--r--	2024-03-10 20:38
netfilter_bridge.h	2.08 KB	-rw-r--r--	2024-03-10 20:38
netfilter_defs.h	242 B	-rw-r--r--	2024-03-10 20:38
netfilter_ipv4.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
netfilter_ipv6.h	5.86 KB	-rw-r--r--	2024-03-10 20:38
netfilter_netdev.h	3.96 KB	-rw-r--r--	2024-03-10 20:38
netfs.h	18.03 KB	-rw-r--r--	2024-03-10 20:38
netlink.h	10.69 KB	-rw-r--r--	2026-07-01 19:48
netpoll.h	2.48 KB	-rw-r--r--	2026-07-01 19:48
nfs.h	1.47 KB	-rw-r--r--	2026-07-01 19:48
nfs3.h	260 B	-rw-r--r--	2024-03-10 20:38
nfs4.h	23.78 KB	-rw-r--r--	2026-07-01 19:48
nfs_common.h	402 B	-rw-r--r--	2026-07-01 19:48
nfs_fs.h	19.97 KB	-rw-r--r--	2026-07-01 19:48
nfs_fs_i.h	308 B	-rw-r--r--	2024-03-10 20:38
nfs_fs_sb.h	11.1 KB	-rw-r--r--	2026-07-01 19:48
nfs_iostat.h	3.92 KB	-rw-r--r--	2024-03-10 20:38
nfs_page.h	8.7 KB	-rw-r--r--	2026-07-01 19:48
nfs_ssc.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
nfs_xdr.h	42.41 KB	-rw-r--r--	2026-07-01 19:48
nfsacl.h	1.4 KB	-rw-r--r--	2024-03-10 20:38
nitro_enclaves.h	267 B	-rw-r--r--	2024-03-10 20:38
nl802154.h	3.87 KB	-rw-r--r--	2024-03-10 20:38
nls.h	3.09 KB	-rw-r--r--	2024-03-10 20:38
nmi.h	7.48 KB	-rw-r--r--	2026-07-01 19:48
node.h	4.7 KB	-rw-r--r--	2026-07-01 19:48
nodemask.h	17.51 KB	-rw-r--r--	2024-03-10 20:38
nodemask_types.h	263 B	-rw-r--r--	2024-03-10 20:38
nospec.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
notifier.h	8.24 KB	-rw-r--r--	2024-03-10 20:38
ns_common.h	283 B	-rw-r--r--	2024-03-10 20:38
nsc_gpio.h	1.42 KB	-rw-r--r--	2024-03-10 20:38
nsproxy.h	3.15 KB	-rw-r--r--	2024-03-10 20:38
ntb.h	52.43 KB	-rw-r--r--	2024-03-10 20:38
ntb_transport.h	3.8 KB	-rw-r--r--	2024-03-10 20:38
nubus.h	5.54 KB	-rw-r--r--	2024-03-10 20:38
numa.h	1.38 KB	-rw-r--r--	2026-07-01 19:48
nvme-auth.h	1.44 KB	-rw-r--r--	2024-03-10 20:38
nvme-fc-driver.h	46.6 KB	-rw-r--r--	2024-03-10 20:38
nvme-fc.h	9.72 KB	-rw-r--r--	2024-03-10 20:38
nvme-keyring.h	732 B	-rw-r--r--	2026-07-01 19:48
nvme-rdma.h	2.07 KB	-rw-r--r--	2024-03-10 20:38
nvme-tcp.h	4.67 KB	-rw-r--r--	2026-07-01 19:48
nvme.h	45.98 KB	-rw-r--r--	2026-07-01 19:48
nvmem-consumer.h	6.87 KB	-rw-r--r--	2024-03-10 20:38
nvmem-provider.h	7.86 KB	-rw-r--r--	2024-03-10 20:38
nvram.h	3.47 KB	-rw-r--r--	2024-03-10 20:38
objagg.h	1.94 KB	-rw-r--r--	2026-07-01 19:48
objpool.h	6.91 KB	-rw-r--r--	2024-03-10 20:38
objtool.h	4.88 KB	-rw-r--r--	2024-03-10 20:38
objtool_types.h	1.8 KB	-rw-r--r--	2024-03-10 20:38
of.h	49.31 KB	-rw-r--r--	2026-07-01 19:48
of_address.h	5.46 KB	-rw-r--r--	2024-03-10 20:38
of_clk.h	819 B	-rw-r--r--	2024-03-10 20:38
of_device.h	2.23 KB	-rw-r--r--	2024-03-10 20:38
of_dma.h	2.3 KB	-rw-r--r--	2024-03-10 20:38
of_fdt.h	3.48 KB	-rw-r--r--	2026-07-01 19:48
of_gpio.h	878 B	-rw-r--r--	2024-03-10 20:38
of_graph.h	3.55 KB	-rw-r--r--	2024-03-10 20:38
of_iommu.h	671 B	-rw-r--r--	2024-03-10 20:38
of_irq.h	3.82 KB	-rw-r--r--	2024-03-10 20:38
of_mdio.h	3.91 KB	-rw-r--r--	2024-03-10 20:38
of_net.h	1.15 KB	-rw-r--r--	2024-03-10 20:38
of_pci.h	915 B	-rw-r--r--	2024-03-10 20:38
of_pdt.h	1.14 KB	-rw-r--r--	2024-03-10 20:38
of_platform.h	4.14 KB	-rw-r--r--	2024-03-10 20:38
of_reserved_mem.h	2.24 KB	-rw-r--r--	2024-03-10 20:38
oid_registry.h	5.99 KB	-rw-r--r--	2026-07-01 19:48
olpc-ec.h	2 KB	-rw-r--r--	2024-03-10 20:38
omap-dma.h	9.54 KB	-rw-r--r--	2024-03-10 20:38
omap-gpmc.h	2.64 KB	-rw-r--r--	2024-03-10 20:38
omap-iommu.h	880 B	-rw-r--r--	2024-03-10 20:38
omap-mailbox.h	689 B	-rw-r--r--	2024-03-10 20:38
omapfb.h	576 B	-rw-r--r--	2024-03-10 20:38
once.h	2.66 KB	-rw-r--r--	2026-07-01 19:48
once_lite.h	926 B	-rw-r--r--	2026-07-01 19:48
oom.h	2.85 KB	-rw-r--r--	2024-03-10 20:38
openvswitch.h	403 B	-rw-r--r--	2024-03-10 20:38
osq_lock.h	912 B	-rw-r--r--	2024-03-10 20:38
overflow.h	12.82 KB	-rw-r--r--	2026-07-01 19:48
packing.h	1.87 KB	-rw-r--r--	2026-07-01 19:48
padata.h	5.98 KB	-rw-r--r--	2026-07-01 19:48
page-flags-layout.h	3.49 KB	-rw-r--r--	2024-03-10 20:38
page-flags.h	37.74 KB	-rw-r--r--	2026-07-01 19:48
page-isolation.h	1.24 KB	-rw-r--r--	2024-03-10 20:38
page_counter.h	2.41 KB	-rw-r--r--	2024-03-10 20:38
page_ext.h	2.91 KB	-rw-r--r--	2024-03-10 20:38
page_idle.h	2.88 KB	-rw-r--r--	2024-03-10 20:38
page_owner.h	2.32 KB	-rw-r--r--	2024-03-10 20:38
page_ref.h	7.54 KB	-rw-r--r--	2026-07-01 19:48
page_reporting.h	895 B	-rw-r--r--	2024-03-10 20:38
page_table_check.h	3.74 KB	-rw-r--r--	2024-03-10 20:38
pageblock-flags.h	2.67 KB	-rw-r--r--	2026-07-01 19:48
pagemap.h	48.04 KB	-rw-r--r--	2026-07-01 19:48
pagevec.h	2.18 KB	-rw-r--r--	2024-03-10 20:38
pagewalk.h	5.17 KB	-rw-r--r--	2024-03-10 20:38
panic.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
panic_notifier.h	296 B	-rw-r--r--	2024-03-10 20:38
parman.h	2.87 KB	-rw-r--r--	2024-03-10 20:38
parport.h	19.02 KB	-rw-r--r--	2024-03-10 20:38
parport_pc.h	6.62 KB	-rw-r--r--	2024-03-10 20:38
parser.h	1.17 KB	-rw-r--r--	2024-03-10 20:38
part_stat.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
pata_arasan_cf_data.h	1.22 KB	-rw-r--r--	2024-03-10 20:38
patchkey.h	757 B	-rw-r--r--	2024-03-10 20:38
path.h	854 B	-rw-r--r--	2026-07-01 19:48
pch_dma.h	408 B	-rw-r--r--	2024-03-10 20:38
pci-acpi.h	4.18 KB	-rw-r--r--	2024-03-10 20:38
pci-ats.h	1.88 KB	-rw-r--r--	2026-07-01 19:48
pci-doe.h	576 B	-rw-r--r--	2024-03-10 20:38
pci-ecam.h	3.28 KB	-rw-r--r--	2024-03-10 20:38
pci-ep-cfs.h	956 B	-rw-r--r--	2024-03-10 20:38
pci-epc.h	10.83 KB	-rw-r--r--	2026-07-01 19:48
pci-epf.h	7.5 KB	-rw-r--r--	2024-03-10 20:38
pci-p2pdma.h	3.01 KB	-rw-r--r--	2024-03-10 20:38
pci.h	99.25 KB	-rw-r--r--	2026-07-01 19:48
pci_hotplug.h	4.35 KB	-rw-r--r--	2024-03-10 20:38
pci_ids.h	125.49 KB	-rw-r--r--	2026-07-01 19:48
pcs-lynx.h	442 B	-rw-r--r--	2024-03-10 20:38
pcs-rzn1-miic.h	385 B	-rw-r--r--	2024-03-10 20:38
pe.h	16.73 KB	-rw-r--r--	2024-03-10 20:38
peci-cpu.h	1.5 KB	-rw-r--r--	2024-03-10 20:38
peci.h	3.17 KB	-rw-r--r--	2024-03-10 20:38
percpu-defs.h	17.22 KB	-rw-r--r--	2024-03-10 20:38
percpu-refcount.h	11.22 KB	-rw-r--r--	2024-03-10 20:38
percpu-rwsem.h	4.33 KB	-rw-r--r--	2024-03-10 20:38
percpu.h	4.72 KB	-rw-r--r--	2024-03-10 20:38
percpu_counter.h	6.81 KB	-rw-r--r--	2024-03-10 20:38
perf_event.h	55.52 KB	-rw-r--r--	2026-07-01 19:48
perf_event_api.h	30 B	-rw-r--r--	2024-03-10 20:38
perf_regs.h	1.05 KB	-rw-r--r--	2024-03-10 20:38
personality.h	393 B	-rw-r--r--	2024-03-10 20:38
pfn.h	666 B	-rw-r--r--	2024-03-10 20:38
pfn_t.h	3.21 KB	-rw-r--r--	2024-03-10 20:38
pgalloc.h	948 B	-rw-r--r--	2026-07-01 19:48
pgtable.h	46.17 KB	-rw-r--r--	2026-07-01 19:48
pgtable_api.h	27 B	-rw-r--r--	2024-03-10 20:38
phonet.h	537 B	-rw-r--r--	2024-03-10 20:38
phy.h	71.52 KB	-rw-r--r--	2026-07-01 19:48
phy_fixed.h	1.82 KB	-rw-r--r--	2024-03-10 20:38
phy_led_triggers.h	1.01 KB	-rw-r--r--	2024-03-10 20:38
phylib_stubs.h	1.5 KB	-rw-r--r--	2024-03-10 20:38
phylink.h	24.63 KB	-rw-r--r--	2024-03-10 20:38
pid.h	9.38 KB	-rw-r--r--	2024-03-10 20:38
pid_namespace.h	3.07 KB	-rw-r--r--	2024-03-10 20:38
pid_types.h	282 B	-rw-r--r--	2024-03-10 20:38
pim.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
pipe_fs_i.h	9.06 KB	-rw-r--r--	2024-03-10 20:38
pkeys.h	990 B	-rw-r--r--	2024-03-10 20:38
pktcdvd.h	5.72 KB	-rw-r--r--	2024-03-10 20:38
pl320-ipc.h	209 B	-rw-r--r--	2024-03-10 20:38
platform_device.h	13.42 KB	-rw-r--r--	2026-07-01 19:48
platform_profile.h	1.16 KB	-rw-r--r--	2026-07-01 19:48
pldmfw.h	4.76 KB	-rw-r--r--	2024-03-10 20:38
plist.h	8.58 KB	-rw-r--r--	2024-03-10 20:38
plist_types.h	315 B	-rw-r--r--	2024-03-10 20:38
pm-trace.h	940 B	-rw-r--r--	2024-03-10 20:38
pm.h	36.78 KB	-rw-r--r--	2024-03-10 20:38
pm_clock.h	2.59 KB	-rw-r--r--	2024-03-10 20:38
pm_domain.h	14.05 KB	-rw-r--r--	2026-07-01 19:48
pm_opp.h	18.38 KB	-rw-r--r--	2024-03-10 20:38
pm_qos.h	10.41 KB	-rw-r--r--	2024-03-10 20:38
pm_runtime.h	20.05 KB	-rw-r--r--	2026-07-01 19:48
pm_wakeirq.h	863 B	-rw-r--r--	2024-03-10 20:38
pm_wakeup.h	7.02 KB	-rw-r--r--	2024-03-10 20:38
pmbus.h	2.48 KB	-rw-r--r--	2024-03-10 20:38
pmu.h	2.45 KB	-rw-r--r--	2024-03-10 20:38
pnp.h	14.86 KB	-rw-r--r--	2026-07-01 19:48
poison.h	2.98 KB	-rw-r--r--	2024-03-10 20:38
poll.h	4.19 KB	-rw-r--r--	2026-07-01 19:48
polynomial.h	814 B	-rw-r--r--	2024-03-10 20:38
posix-clock.h	4.7 KB	-rw-r--r--	2026-07-01 19:48
posix-timers.h	5.35 KB	-rw-r--r--	2024-03-10 20:38
posix-timers_types.h	2.21 KB	-rw-r--r--	2024-03-10 20:38
posix_acl.h	4.28 KB	-rw-r--r--	2024-03-10 20:38
posix_acl_xattr.h	1.95 KB	-rw-r--r--	2024-03-10 20:38
power_supply.h	40.07 KB	-rw-r--r--	2024-03-10 20:38
powercap.h	11.98 KB	-rw-r--r--	2024-03-10 20:38
ppp-comp.h	2.97 KB	-rw-r--r--	2024-03-10 20:38
ppp_channel.h	3.04 KB	-rw-r--r--	2024-03-10 20:38
ppp_defs.h	1.12 KB	-rw-r--r--	2026-07-01 19:48
pps_kernel.h	2.94 KB	-rw-r--r--	2026-07-01 19:48
pr.h	1.33 KB	-rw-r--r--	2024-03-10 20:38
prandom.h	1.28 KB	-rw-r--r--	2024-03-10 20:38
preempt.h	15.75 KB	-rw-r--r--	2026-07-01 19:48
prefetch.h	1.55 KB	-rw-r--r--	2024-03-10 20:38
prime_numbers.h	1.35 KB	-rw-r--r--	2024-03-10 20:38
printk.h	23.3 KB	-rw-r--r--	2026-07-01 19:48
prmt.h	143 B	-rw-r--r--	2024-03-10 20:38
proc_fs.h	9.13 KB	-rw-r--r--	2026-07-01 19:48
proc_ns.h	2.52 KB	-rw-r--r--	2024-03-10 20:38
processor.h	1.84 KB	-rw-r--r--	2024-03-10 20:38
profile.h	1.5 KB	-rw-r--r--	2026-07-01 19:48
projid.h	2.22 KB	-rw-r--r--	2024-03-10 20:38
property.h	19.95 KB	-rw-r--r--	2026-07-01 19:48
pruss_driver.h	4.44 KB	-rw-r--r--	2026-07-01 19:48
psci.h	1.52 KB	-rw-r--r--	2024-03-10 20:38
pseudo_fs.h	362 B	-rw-r--r--	2024-03-10 20:38
psi.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
psi_types.h	4.94 KB	-rw-r--r--	2026-07-01 19:48
psp-platform-access.h	1.83 KB	-rw-r--r--	2024-03-10 20:38
psp-sev.h	18.33 KB	-rw-r--r--	2024-03-10 20:38
psp-tee.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
psp.h	771 B	-rw-r--r--	2026-07-01 19:48
pstore.h	7.76 KB	-rw-r--r--	2024-03-10 20:38
pstore_blk.h	1.53 KB	-rw-r--r--	2024-03-10 20:38
pstore_ram.h	883 B	-rw-r--r--	2024-03-10 20:38
pstore_zone.h	2.28 KB	-rw-r--r--	2024-03-10 20:38
ptdump.h	567 B	-rw-r--r--	2024-03-10 20:38
pti.h	240 B	-rw-r--r--	2024-03-10 20:38
ptp_classify.h	6.88 KB	-rw-r--r--	2024-03-10 20:38
ptp_clock_kernel.h	15.59 KB	-rw-r--r--	2024-03-10 20:38
ptp_kvm.h	486 B	-rw-r--r--	2024-03-10 20:38
ptp_mock.h	670 B	-rw-r--r--	2024-03-10 20:38
ptp_pch.h	666 B	-rw-r--r--	2024-03-10 20:38
ptr_ring.h	16.23 KB	-rw-r--r--	2026-07-01 19:48
ptrace.h	16.79 KB	-rw-r--r--	2024-03-10 20:38
ptrace_api.h	26 B	-rw-r--r--	2024-03-10 20:38
purgatory.h	590 B	-rw-r--r--	2024-03-10 20:38
pvclock_gtod.h	548 B	-rw-r--r--	2024-03-10 20:38
pwm.h	15.65 KB	-rw-r--r--	2026-07-01 19:48
pwm_backlight.h	709 B	-rw-r--r--	2024-03-10 20:38
pxa168_eth.h	728 B	-rw-r--r--	2024-03-10 20:38
pxa2xx_ssp.h	11.13 KB	-rw-r--r--	2024-03-10 20:38
qnx6_fs.h	3.27 KB	-rw-r--r--	2024-03-10 20:38
quota.h	18.76 KB	-rw-r--r--	2026-07-01 19:48
quotaops.h	10.05 KB	-rw-r--r--	2026-07-01 19:48
radix-tree.h	15.95 KB	-rw-r--r--	2024-03-10 20:38
raid_class.h	2.01 KB	-rw-r--r--	2024-03-10 20:38
ramfs.h	746 B	-rw-r--r--	2024-03-10 20:38
random.h	5.14 KB	-rw-r--r--	2024-03-10 20:38
randomize_kstack.h	3.83 KB	-rw-r--r--	2026-07-01 19:48
range.h	743 B	-rw-r--r--	2024-03-10 20:38
ras.h	1.39 KB	-rw-r--r--	2026-07-01 19:48
ratelimit.h	1.72 KB	-rw-r--r--	2024-03-10 20:38
ratelimit_types.h	1.33 KB	-rw-r--r--	2024-03-10 20:38
rational.h	639 B	-rw-r--r--	2024-03-10 20:38
rbtree.h	8.94 KB	-rw-r--r--	2024-03-10 20:38
rbtree_augmented.h	10.18 KB	-rw-r--r--	2024-03-10 20:38
rbtree_latch.h	6.66 KB	-rw-r--r--	2024-03-10 20:38
rbtree_types.h	946 B	-rw-r--r--	2024-03-10 20:38
rcu_node_tree.h	3.73 KB	-rw-r--r--	2024-03-10 20:38
rcu_notifier.h	1.09 KB	-rw-r--r--	2024-03-10 20:38
rcu_segcblist.h	11.72 KB	-rw-r--r--	2024-03-10 20:38
rcu_sync.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
rculist.h	28.56 KB	-rw-r--r--	2024-03-10 20:38
rculist_bl.h	3.29 KB	-rw-r--r--	2024-03-10 20:38
rculist_nulls.h	8.71 KB	-rw-r--r--	2026-07-01 19:48
rcupdate.h	39.69 KB	-rw-r--r--	2026-07-01 19:48
rcupdate_trace.h	3.16 KB	-rw-r--r--	2024-03-10 20:38
rcupdate_wait.h	2.16 KB	-rw-r--r--	2024-03-10 20:38
rcuref.h	4.66 KB	-rw-r--r--	2026-07-01 19:48
rcutiny.h	4.62 KB	-rw-r--r--	2026-07-01 19:48
rcutree.h	4.38 KB	-rw-r--r--	2026-07-01 19:48
rcuwait.h	2.32 KB	-rw-r--r--	2024-03-10 20:38
rcuwait_api.h	27 B	-rw-r--r--	2024-03-10 20:38
reboot-mode.h	600 B	-rw-r--r--	2024-03-10 20:38
reboot.h	4.95 KB	-rw-r--r--	2024-03-10 20:38
reciprocal_div.h	3.28 KB	-rw-r--r--	2024-03-10 20:38
ref_tracker.h	2.35 KB	-rw-r--r--	2024-03-10 20:38
refcount.h	11.78 KB	-rw-r--r--	2024-03-10 20:38
refcount_api.h	28 B	-rw-r--r--	2024-03-10 20:38
refcount_types.h	512 B	-rw-r--r--	2024-03-10 20:38
regmap.h	69.16 KB	-rw-r--r--	2026-07-01 19:48
regset.h	11.35 KB	-rw-r--r--	2024-03-10 20:38
relay.h	8.47 KB	-rw-r--r--	2024-03-10 20:38
remoteproc.h	25.08 KB	-rw-r--r--	2024-03-10 20:38
resctrl.h	8.69 KB	-rw-r--r--	2024-03-10 20:38
reset-controller.h	3.57 KB	-rw-r--r--	2024-03-10 20:38
reset.h	30.96 KB	-rw-r--r--	2026-07-01 19:48
resource.h	223 B	-rw-r--r--	2024-03-10 20:38
resource_ext.h	2.08 KB	-rw-r--r--	2024-03-10 20:38
restart_block.h	1.11 KB	-rw-r--r--	2024-03-10 20:38
resume_user_mode.h	1.88 KB	-rw-r--r--	2024-03-10 20:38
rethook.h	3.15 KB	-rw-r--r--	2024-03-10 20:38
rfkill.h	10.75 KB	-rw-r--r--	2024-03-10 20:38
rhashtable-types.h	3.46 KB	-rw-r--r--	2024-03-10 20:38
rhashtable.h	37.92 KB	-rw-r--r--	2024-03-10 20:38
ring_buffer.h	7.93 KB	-rw-r--r--	2026-07-01 19:48
rio.h	19.02 KB	-rw-r--r--	2024-03-10 20:38
rio_drv.h	14.32 KB	-rw-r--r--	2024-03-10 20:38
rio_ids.h	723 B	-rw-r--r--	2024-03-10 20:38
rio_regs.h	19.07 KB	-rw-r--r--	2024-03-10 20:38
rmap.h	24.05 KB	-rw-r--r--	2024-03-10 20:38
rmi.h	12.04 KB	-rw-r--r--	2024-03-10 20:38
rndis.h	16.86 KB	-rw-r--r--	2024-03-10 20:38
rodata_test.h	394 B	-rw-r--r--	2024-03-10 20:38
root_dev.h	361 B	-rw-r--r--	2024-03-10 20:38
rpmsg.h	9.46 KB	-rw-r--r--	2024-03-10 20:38
rseq.h	3.08 KB	-rw-r--r--	2026-07-01 19:48
rslib.h	3.64 KB	-rw-r--r--	2024-03-10 20:38
rtc.h	9.25 KB	-rw-r--r--	2024-03-10 20:38
rtmutex.h	3.38 KB	-rw-r--r--	2024-03-10 20:38
rtnetlink.h	5.5 KB	-rw-r--r--	2024-03-10 20:38
rtsx_common.h	890 B	-rw-r--r--	2024-03-10 20:38
rtsx_pci.h	40.09 KB	-rw-r--r--	2024-03-10 20:38
rtsx_usb.h	15.38 KB	-rw-r--r--	2024-03-10 20:38
rv.h	1.56 KB	-rw-r--r--	2024-03-10 20:38
rwbase_rt.h	1020 B	-rw-r--r--	2026-07-01 19:48
rwlock.h	4.15 KB	-rw-r--r--	2024-03-10 20:38
rwlock_api_smp.h	7.85 KB	-rw-r--r--	2024-03-10 20:38
rwlock_rt.h	3.29 KB	-rw-r--r--	2024-03-10 20:38
rwlock_types.h	1.77 KB	-rw-r--r--	2024-03-10 20:38
rwsem.h	8.57 KB	-rw-r--r--	2026-07-01 19:48
sbitmap.h	17.81 KB	-rw-r--r--	2026-07-01 19:48
scatterlist.h	21.17 KB	-rw-r--r--	2026-07-01 19:48
scc.h	2.84 KB	-rw-r--r--	2024-03-10 20:38
sched.h	61.03 KB	-rw-r--r--	2026-07-01 19:48
sched_clock.h	1.46 KB	-rw-r--r--	2024-03-10 20:38
scmi_protocol.h	35 KB	-rw-r--r--	2024-03-10 20:38
scpi_protocol.h	2.67 KB	-rw-r--r--	2024-03-10 20:38
screen_info.h	3.35 KB	-rw-r--r--	2026-07-01 19:48
scs.h	2.25 KB	-rw-r--r--	2024-03-10 20:38
sctp.h	23.09 KB	-rw-r--r--	2024-03-10 20:38
scx200.h	1.82 KB	-rw-r--r--	2024-03-10 20:38
scx200_gpio.h	2.38 KB	-rw-r--r--	2024-03-10 20:38
seccomp.h	2.99 KB	-rw-r--r--	2026-07-01 19:48
seccomp_types.h	834 B	-rw-r--r--	2024-03-10 20:38
secretmem.h	706 B	-rw-r--r--	2026-07-01 19:48
securebits.h	239 B	-rw-r--r--	2024-03-10 20:38
security.h	61.1 KB	-rw-r--r--	2026-07-01 19:48
sed-opal-key.h	614 B	-rw-r--r--	2024-03-10 20:38
sed-opal.h	1.92 KB	-rw-r--r--	2024-03-10 20:38
seg6.h	121 B	-rw-r--r--	2024-03-10 20:38
seg6_genl.h	136 B	-rw-r--r--	2024-03-10 20:38
seg6_hmac.h	136 B	-rw-r--r--	2024-03-10 20:38
seg6_iptunnel.h	148 B	-rw-r--r--	2024-03-10 20:38
seg6_local.h	100 B	-rw-r--r--	2024-03-10 20:38
selection.h	1.81 KB	-rw-r--r--	2026-07-01 19:48
sem.h	515 B	-rw-r--r--	2024-03-10 20:38
sem_types.h	234 B	-rw-r--r--	2024-03-10 20:38
semaphore.h	1.58 KB	-rw-r--r--	2024-03-10 20:38
seq_buf.h	4.24 KB	-rw-r--r--	2024-03-10 20:38
seq_file.h	9.99 KB	-rw-r--r--	2024-03-10 20:38
seq_file_net.h	787 B	-rw-r--r--	2024-03-10 20:38
seqlock.h	36.77 KB	-rw-r--r--	2026-07-01 19:48
seqlock_api.h	27 B	-rw-r--r--	2024-03-10 20:38
seqlock_types.h	3.11 KB	-rw-r--r--	2024-03-10 20:38
serdev.h	10.12 KB	-rw-r--r--	2024-03-10 20:38
serial.h	1.03 KB	-rw-r--r--	2024-03-10 20:38
serial_8250.h	7.21 KB	-rw-r--r--	2024-03-10 20:38
serial_bcm63xx.h	4.73 KB	-rw-r--r--	2024-03-10 20:38
serial_core.h	36.91 KB	-rw-r--r--	2026-07-01 19:48
serial_max3100.h	1.19 KB	-rw-r--r--	2024-03-10 20:38
serial_s3c.h	9.32 KB	-rw-r--r--	2024-03-10 20:38
serial_sci.h	1.6 KB	-rw-r--r--	2024-03-10 20:38
serio.h	4.39 KB	-rw-r--r--	2026-07-01 19:48
set_memory.h	1.9 KB	-rw-r--r--	2024-03-10 20:38
sfp.h	16.93 KB	-rw-r--r--	2026-07-01 19:48
sh_clk.h	5.96 KB	-rw-r--r--	2024-03-10 20:38
sh_dma.h	3.47 KB	-rw-r--r--	2024-03-10 20:38
sh_eth.h	369 B	-rw-r--r--	2024-03-10 20:38
sh_intc.h	3.63 KB	-rw-r--r--	2024-03-10 20:38
sh_timer.h	172 B	-rw-r--r--	2024-03-10 20:38
shdma-base.h	4.27 KB	-rw-r--r--	2026-07-01 19:48
shm.h	961 B	-rw-r--r--	2024-03-10 20:38
shmem_fs.h	7.65 KB	-rw-r--r--	2026-07-01 19:48
shrinker.h	4.87 KB	-rw-r--r--	2024-03-10 20:38
signal.h	13.79 KB	-rw-r--r--	2024-03-10 20:38
signal_types.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
signalfd.h	817 B	-rw-r--r--	2024-03-10 20:38
siox.h	2.26 KB	-rw-r--r--	2024-03-10 20:38
siphash.h	5.66 KB	-rw-r--r--	2024-03-10 20:38
sizes.h	1.68 KB	-rw-r--r--	2024-03-10 20:38
skb_array.h	5.22 KB	-rw-r--r--	2026-07-01 19:48
skbuff.h	145.75 KB	-rw-r--r--	2026-07-01 19:48
skmsg.h	15.4 KB	-rw-r--r--	2026-07-01 19:48
slab.h	24.79 KB	-rw-r--r--	2026-07-01 19:48
slimbus.h	6.93 KB	-rw-r--r--	2024-03-10 20:38
sm501-regs.h	11.62 KB	-rw-r--r--	2024-03-10 20:38
sm501.h	4.02 KB	-rw-r--r--	2024-03-10 20:38
smc91x.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
smp.h	7.93 KB	-rw-r--r--	2026-07-01 19:48
smp_types.h	1.35 KB	-rw-r--r--	2024-03-10 20:38
smpboot.h	1.68 KB	-rw-r--r--	2024-03-10 20:38
smsc911x.h	1.63 KB	-rw-r--r--	2024-03-10 20:38
smscphy.h	3.1 KB	-rw-r--r--	2024-03-10 20:38
sock_diag.h	2.42 KB	-rw-r--r--	2026-07-01 19:48
socket.h	15.49 KB	-rw-r--r--	2024-03-10 20:38
sockptr.h	3.8 KB	-rw-r--r--	2026-07-01 19:48
softirq.h	29 B	-rw-r--r--	2024-03-10 20:38
sonet.h	469 B	-rw-r--r--	2024-03-10 20:38
sony-laptop.h	1.41 KB	-rw-r--r--	2024-03-10 20:38
sonypi.h	1.71 KB	-rw-r--r--	2024-03-10 20:38
sort.h	348 B	-rw-r--r--	2024-03-10 20:38
sound.h	685 B	-rw-r--r--	2024-03-10 20:38
soundcard.h	1.59 KB	-rw-r--r--	2024-03-10 20:38
spinlock.h	17.55 KB	-rw-r--r--	2026-07-01 19:48
spinlock_api.h	28 B	-rw-r--r--	2024-03-10 20:38
spinlock_api_smp.h	5.23 KB	-rw-r--r--	2024-03-10 20:38
spinlock_api_up.h	3.38 KB	-rw-r--r--	2024-03-10 20:38
spinlock_rt.h	4.12 KB	-rw-r--r--	2024-03-10 20:38
spinlock_types.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
spinlock_types_raw.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
spinlock_types_up.h	730 B	-rw-r--r--	2024-03-10 20:38
spinlock_up.h	2.08 KB	-rw-r--r--	2026-07-01 19:48
splice.h	3.72 KB	-rw-r--r--	2024-03-10 20:38
spmi.h	5.85 KB	-rw-r--r--	2024-03-10 20:38
sprintf.h	1.24 KB	-rw-r--r--	2026-07-01 19:48
sram.h	437 B	-rw-r--r--	2024-03-10 20:38
srcu.h	11.26 KB	-rw-r--r--	2024-03-10 20:38
srcutiny.h	2.96 KB	-rw-r--r--	2024-03-10 20:38
srcutree.h	7.67 KB	-rw-r--r--	2024-03-10 20:38
ssbi.h	726 B	-rw-r--r--	2024-03-10 20:38
stackdepot.h	8.65 KB	-rw-r--r--	2026-07-01 19:48
stackleak.h	2.36 KB	-rw-r--r--	2024-03-10 20:38
stackprotector.h	859 B	-rw-r--r--	2024-03-10 20:38
stacktrace.h	4 KB	-rw-r--r--	2024-03-10 20:38
start_kernel.h	448 B	-rw-r--r--	2024-03-10 20:38
stat.h	1.69 KB	-rw-r--r--	2024-03-10 20:38
statfs.h	1.78 KB	-rw-r--r--	2024-03-10 20:38
static_call.h	10.66 KB	-rw-r--r--	2026-07-01 19:48
static_call_types.h	2.74 KB	-rw-r--r--	2024-03-10 20:38
static_key.h	30 B	-rw-r--r--	2024-03-10 20:38
stdarg.h	313 B	-rw-r--r--	2024-03-10 20:38
stddef.h	3.17 KB	-rw-r--r--	2024-03-10 20:38
stm.h	4.34 KB	-rw-r--r--	2024-03-10 20:38
stmmac.h	8.35 KB	-rw-r--r--	2026-07-01 19:48
stmp3xxx_rtc_wdt.h	331 B	-rw-r--r--	2024-03-10 20:38
stmp_device.h	412 B	-rw-r--r--	2024-03-10 20:38
stop_machine.h	4.93 KB	-rw-r--r--	2024-03-10 20:38
string.h	12.24 KB	-rw-r--r--	2024-03-10 20:38
string_choices.h	979 B	-rw-r--r--	2026-07-01 19:48
string_helpers.h	3.17 KB	-rw-r--r--	2024-03-10 20:38
stringhash.h	2.65 KB	-rw-r--r--	2024-03-10 20:38
stringify.h	395 B	-rw-r--r--	2024-03-10 20:38
sungem_phy.h	3.96 KB	-rw-r--r--	2024-03-10 20:38
sunserialcore.h	1.08 KB	-rw-r--r--	2024-03-10 20:38
sunxi-rsb.h	2.89 KB	-rw-r--r--	2024-03-10 20:38
surface_acpi_notify.h	1.07 KB	-rw-r--r--	2024-03-10 20:38
suspend.h	21.74 KB	-rw-r--r--	2024-03-10 20:38
svga.h	3.75 KB	-rw-r--r--	2024-03-10 20:38
sw842.h	328 B	-rw-r--r--	2024-03-10 20:38
swab.h	912 B	-rw-r--r--	2024-03-10 20:38
swait.h	9.47 KB	-rw-r--r--	2024-03-10 20:38
swait_api.h	25 B	-rw-r--r--	2024-03-10 20:38
swap.h	21.49 KB	-rw-r--r--	2026-07-01 19:48
swap_cgroup.h	972 B	-rw-r--r--	2024-03-10 20:38
swap_slots.h	842 B	-rw-r--r--	2024-03-10 20:38
swapfile.h	450 B	-rw-r--r--	2024-03-10 20:38
swapops.h	15.55 KB	-rw-r--r--	2026-07-01 19:48
swiotlb.h	8.06 KB	-rw-r--r--	2024-03-10 20:38
switchtec.h	10.92 KB	-rw-r--r--	2024-03-10 20:38
sxgbe_platform.h	1.23 KB	-rw-r--r--	2024-03-10 20:38
sync_core.h	581 B	-rw-r--r--	2024-03-10 20:38
sync_file.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
synclink.h	989 B	-rw-r--r--	2024-03-10 20:38
sys.h	960 B	-rw-r--r--	2024-03-10 20:38
sys_soc.h	1.26 KB	-rw-r--r--	2024-03-10 20:38
syscall_user_dispatch.h	1.31 KB	-rw-r--r--	2024-03-10 20:38
syscall_user_dispatch_types.h	388 B	-rw-r--r--	2024-03-10 20:38
syscalls.h	55.59 KB	-rw-r--r--	2026-07-01 19:48
syscalls_api.h	28 B	-rw-r--r--	2024-03-10 20:38
syscore_ops.h	633 B	-rw-r--r--	2024-03-10 20:38
sysctl.h	9.6 KB	-rw-r--r--	2026-07-01 19:48
sysfb.h	2.76 KB	-rw-r--r--	2026-07-01 19:48
sysfs.h	18.23 KB	-rw-r--r--	2024-03-10 20:38
syslog.h	1.29 KB	-rw-r--r--	2024-03-10 20:38
sysrq.h	1.95 KB	-rw-r--r--	2024-03-10 20:38
sysv_fs.h	9.03 KB	-rw-r--r--	2024-03-10 20:38
t10-pi.h	2.17 KB	-rw-r--r--	2024-03-10 20:38
task_io_accounting.h	1.13 KB	-rw-r--r--	2024-03-10 20:38
task_io_accounting_ops.h	2.55 KB	-rw-r--r--	2024-03-10 20:38
task_work.h	1.1 KB	-rw-r--r--	2026-07-01 19:48
taskstats_kern.h	957 B	-rw-r--r--	2024-03-10 20:38
tboot.h	3.26 KB	-rw-r--r--	2024-03-10 20:38
tc.h	3.45 KB	-rw-r--r--	2024-03-10 20:38
tca6416_keypad.h	683 B	-rw-r--r--	2024-03-10 20:38
tcp.h	20.61 KB	-rw-r--r--	2026-07-01 19:48
tee_drv.h	15.77 KB	-rw-r--r--	2024-03-10 20:38
tegra-icc.h	1.86 KB	-rw-r--r--	2024-03-10 20:38
termios_internal.h	1.48 KB	-rw-r--r--	2024-03-10 20:38
textsearch.h	4.75 KB	-rw-r--r--	2026-07-01 19:48
textsearch_fsm.h	1.19 KB	-rw-r--r--	2024-03-10 20:38
tfrc.h	1.68 KB	-rw-r--r--	2024-03-10 20:38
thermal.h	15.81 KB	-rw-r--r--	2026-07-01 19:48
thread_info.h	7.47 KB	-rw-r--r--	2024-03-10 20:38
threads.h	1.28 KB	-rw-r--r--	2024-03-10 20:38
thunderbolt.h	21.4 KB	-rw-r--r--	2024-03-10 20:38
ti-emif-sram.h	4.75 KB	-rw-r--r--	2024-03-10 20:38
ti_wilink_st.h	13.47 KB	-rw-r--r--	2024-03-10 20:38
tick.h	9.85 KB	-rw-r--r--	2026-07-01 19:48
tifm.h	4.66 KB	-rw-r--r--	2024-03-10 20:38
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Rename

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *  Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
 *  Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
 */
#ifndef __LINUX_CLK_PROVIDER_H
#define __LINUX_CLK_PROVIDER_H

#include <linux/of.h>
#include <linux/of_clk.h>

/*
 * flags used across common struct clk.  these flags should only affect the
 * top-level framework.  custom flags for dealing with hardware specifics
 * belong in struct clk_foo
 *
 * Please update clk_flags[] in drivers/clk/clk.c when making changes here!
 */
#define CLK_SET_RATE_GATE	BIT(0) /* must be gated across rate change */
#define CLK_SET_PARENT_GATE	BIT(1) /* must be gated across re-parent */
#define CLK_SET_RATE_PARENT	BIT(2) /* propagate rate change up one level */
#define CLK_IGNORE_UNUSED	BIT(3) /* do not gate even if unused */
				/* unused */
				/* unused */
#define CLK_GET_RATE_NOCACHE	BIT(6) /* do not use the cached clk rate */
#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
#define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */
#define CLK_RECALC_NEW_RATES	BIT(9) /* recalc rates after notifications */
#define CLK_SET_RATE_UNGATE	BIT(10) /* clock needs to run to set rate */
#define CLK_IS_CRITICAL		BIT(11) /* do not gate, ever */
/* parents need enable during gate/ungate, set rate and re-parent */
#define CLK_OPS_PARENT_ENABLE	BIT(12)
/* duty cycle call may be forwarded to the parent clock */
#define CLK_DUTY_CYCLE_PARENT	BIT(13)

struct clk;
struct clk_hw;
struct clk_core;
struct dentry;

/**
 * struct clk_rate_request - Structure encoding the clk constraints that
 * a clock user might require.
 *
 * Should be initialized by calling clk_hw_init_rate_request().
 *
 * @core: 		Pointer to the struct clk_core affected by this request
 * @rate:		Requested clock rate. This field will be adjusted by
 *			clock drivers according to hardware capabilities.
 * @min_rate:		Minimum rate imposed by clk users.
 * @max_rate:		Maximum rate imposed by clk users.
 * @best_parent_rate:	The best parent rate a parent can provide to fulfill the
 *			requested constraints.
 * @best_parent_hw:	The most appropriate parent clock that fulfills the
 *			requested constraints.
 *
 */
struct clk_rate_request {
	struct clk_core *core;
	unsigned long rate;
	unsigned long min_rate;
	unsigned long max_rate;
	unsigned long best_parent_rate;
	struct clk_hw *best_parent_hw;
};

void clk_hw_init_rate_request(const struct clk_hw *hw,
			      struct clk_rate_request *req,
			      unsigned long rate);
void clk_hw_forward_rate_request(const struct clk_hw *core,
				 const struct clk_rate_request *old_req,
				 const struct clk_hw *parent,
				 struct clk_rate_request *req,
				 unsigned long parent_rate);

/**
 * struct clk_duty - Structure encoding the duty cycle ratio of a clock
 *
 * @num:	Numerator of the duty cycle ratio
 * @den:	Denominator of the duty cycle ratio
 */
struct clk_duty {
	unsigned int num;
	unsigned int den;
};

/**
 * struct clk_ops -  Callback operations for hardware clocks; these are to
 * be provided by the clock implementation, and will be called by drivers
 * through the clk_* api.
 *
 * @prepare:	Prepare the clock for enabling. This must not return until
 *		the clock is fully prepared, and it's safe to call clk_enable.
 *		This callback is intended to allow clock implementations to
 *		do any initialisation that may sleep. Called with
 *		prepare_lock held.
 *
 * @unprepare:	Release the clock from its prepared state. This will typically
 *		undo any work done in the @prepare callback. Called with
 *		prepare_lock held.
 *
 * @is_prepared: Queries the hardware to determine if the clock is prepared.
 *		This function is allowed to sleep. Optional, if this op is not
 *		set then the prepare count will be used.
 *
 * @unprepare_unused: Unprepare the clock atomically.  Only called from
 *		clk_disable_unused for prepare clocks with special needs.
 *		Called with prepare mutex held. This function may sleep.
 *
 * @enable:	Enable the clock atomically. This must not return until the
 *		clock is generating a valid clock signal, usable by consumer
 *		devices. Called with enable_lock held. This function must not
 *		sleep.
 *
 * @disable:	Disable the clock atomically. Called with enable_lock held.
 *		This function must not sleep.
 *
 * @is_enabled:	Queries the hardware to determine if the clock is enabled.
 *		This function must not sleep. Optional, if this op is not
 *		set then the enable count will be used.
 *
 * @disable_unused: Disable the clock atomically.  Only called from
 *		clk_disable_unused for gate clocks with special needs.
 *		Called with enable_lock held.  This function must not
 *		sleep.
 *
 * @save_context: Save the context of the clock in prepration for poweroff.
 *
 * @restore_context: Restore the context of the clock after a restoration
 *		of power.
 *
 * @recalc_rate: Recalculate the rate of this clock, by querying hardware. The
 *		parent rate is an input parameter.  It is up to the caller to
 *		ensure that the prepare_mutex is held across this call. If the
 *		driver cannot figure out a rate for this clock, it must return
 *		0. Returns the calculated rate. Optional, but recommended - if
 *		this op is not set then clock rate will be initialized to 0.
 *
 * @round_rate:	Given a target rate as input, returns the closest rate actually
 *		supported by the clock. The parent rate is an input/output
 *		parameter.
 *
 * @determine_rate: Given a target rate as input, returns the closest rate
 *		actually supported by the clock, and optionally the parent clock
 *		that should be used to provide the clock rate.
 *
 * @set_parent:	Change the input source of this clock; for clocks with multiple
 *		possible parents specify a new parent by passing in the index
 *		as a u8 corresponding to the parent in either the .parent_names
 *		or .parents arrays.  This function in affect translates an
 *		array index into the value programmed into the hardware.
 *		Returns 0 on success, -EERROR otherwise.
 *
 * @get_parent:	Queries the hardware to determine the parent of a clock.  The
 *		return value is a u8 which specifies the index corresponding to
 *		the parent clock.  This index can be applied to either the
 *		.parent_names or .parents arrays.  In short, this function
 *		translates the parent value read from hardware into an array
 *		index.  Currently only called when the clock is initialized by
 *		__clk_init.  This callback is mandatory for clocks with
 *		multiple parents.  It is optional (and unnecessary) for clocks
 *		with 0 or 1 parents.
 *
 * @set_rate:	Change the rate of this clock. The requested rate is specified
 *		by the second argument, which should typically be the return
 *		of .round_rate call.  The third argument gives the parent rate
 *		which is likely helpful for most .set_rate implementation.
 *		Returns 0 on success, -EERROR otherwise.
 *
 * @set_rate_and_parent: Change the rate and the parent of this clock. The
 *		requested rate is specified by the second argument, which
 *		should typically be the return of .round_rate call.  The
 *		third argument gives the parent rate which is likely helpful
 *		for most .set_rate_and_parent implementation. The fourth
 *		argument gives the parent index. This callback is optional (and
 *		unnecessary) for clocks with 0 or 1 parents as well as
 *		for clocks that can tolerate switching the rate and the parent
 *		separately via calls to .set_parent and .set_rate.
 *		Returns 0 on success, -EERROR otherwise.
 *
 * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy
 *		is expressed in ppb (parts per billion). The parent accuracy is
 *		an input parameter.
 *		Returns the calculated accuracy.  Optional - if	this op is not
 *		set then clock accuracy will be initialized to parent accuracy
 *		or 0 (perfect clock) if clock has no parent.
 *
 * @get_phase:	Queries the hardware to get the current phase of a clock.
 *		Returned values are 0-359 degrees on success, negative
 *		error codes on failure.
 *
 * @set_phase:	Shift the phase this clock signal in degrees specified
 *		by the second argument. Valid values for degrees are
 *		0-359. Return 0 on success, otherwise -EERROR.
 *
 * @get_duty_cycle: Queries the hardware to get the current duty cycle ratio
 *              of a clock. Returned values denominator cannot be 0 and must be
 *              superior or equal to the numerator.
 *
 * @set_duty_cycle: Apply the duty cycle ratio to this clock signal specified by
 *              the numerator (2nd argurment) and denominator (3rd  argument).
 *              Argument must be a valid ratio (denominator > 0
 *              and >= numerator) Return 0 on success, otherwise -EERROR.
 *
 * @init:	Perform platform-specific initialization magic.
 *		This is not used by any of the basic clock types.
 *		This callback exist for HW which needs to perform some
 *		initialisation magic for CCF to get an accurate view of the
 *		clock. It may also be used dynamic resource allocation is
 *		required. It shall not used to deal with clock parameters,
 *		such as rate or parents.
 *		Returns 0 on success, -EERROR otherwise.
 *
 * @terminate:  Free any resource allocated by init.
 *
 * @debug_init:	Set up type-specific debugfs entries for this clock.  This
 *		is called once, after the debugfs directory entry for this
 *		clock has been created.  The dentry pointer representing that
 *		directory is provided as an argument.  Called with
 *		prepare_lock held.  Returns 0 on success, -EERROR otherwise.
 *
 *
 * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
 * implementations to split any work between atomic (enable) and sleepable
 * (prepare) contexts.  If enabling a clock requires code that might sleep,
 * this must be done in clk_prepare.  Clock enable code that will never be
 * called in a sleepable context may be implemented in clk_enable.
 *
 * Typically, drivers will call clk_prepare when a clock may be needed later
 * (eg. when a device is opened), and clk_enable when the clock is actually
 * required (eg. from an interrupt). Note that clk_prepare MUST have been
 * called before clk_enable.
 */
struct clk_ops {
	int		(*prepare)(struct clk_hw *hw);
	void		(*unprepare)(struct clk_hw *hw);
	int		(*is_prepared)(struct clk_hw *hw);
	void		(*unprepare_unused)(struct clk_hw *hw);
	int		(*enable)(struct clk_hw *hw);
	void		(*disable)(struct clk_hw *hw);
	int		(*is_enabled)(struct clk_hw *hw);
	void		(*disable_unused)(struct clk_hw *hw);
	int		(*save_context)(struct clk_hw *hw);
	void		(*restore_context)(struct clk_hw *hw);
	unsigned long	(*recalc_rate)(struct clk_hw *hw,
					unsigned long parent_rate);
	long		(*round_rate)(struct clk_hw *hw, unsigned long rate,
					unsigned long *parent_rate);
	int		(*determine_rate)(struct clk_hw *hw,
					  struct clk_rate_request *req);
	int		(*set_parent)(struct clk_hw *hw, u8 index);
	u8		(*get_parent)(struct clk_hw *hw);
	int		(*set_rate)(struct clk_hw *hw, unsigned long rate,
				    unsigned long parent_rate);
	int		(*set_rate_and_parent)(struct clk_hw *hw,
				    unsigned long rate,
				    unsigned long parent_rate, u8 index);
	unsigned long	(*recalc_accuracy)(struct clk_hw *hw,
					   unsigned long parent_accuracy);
	int		(*get_phase)(struct clk_hw *hw);
	int		(*set_phase)(struct clk_hw *hw, int degrees);
	int		(*get_duty_cycle)(struct clk_hw *hw,
					  struct clk_duty *duty);
	int		(*set_duty_cycle)(struct clk_hw *hw,
					  struct clk_duty *duty);
	int		(*init)(struct clk_hw *hw);
	void		(*terminate)(struct clk_hw *hw);
	void		(*debug_init)(struct clk_hw *hw, struct dentry *dentry);
};

/**
 * struct clk_parent_data - clk parent information
 * @hw: parent clk_hw pointer (used for clk providers with internal clks)
 * @fw_name: parent name local to provider registering clk
 * @name: globally unique parent name (used as a fallback)
 * @index: parent index local to provider registering clk (if @fw_name absent)
 */
struct clk_parent_data {
	const struct clk_hw	*hw;
	const char		*fw_name;
	const char		*name;
	int			index;
};

/**
 * struct clk_init_data - holds init data that's common to all clocks and is
 * shared between the clock provider and the common clock framework.
 *
 * @name: clock name
 * @ops: operations this clock supports
 * @parent_names: array of string names for all possible parents
 * @parent_data: array of parent data for all possible parents (when some
 *               parents are external to the clk controller)
 * @parent_hws: array of pointers to all possible parents (when all parents
 *              are internal to the clk controller)
 * @num_parents: number of possible parents
 * @flags: framework-level hints and quirks
 */
struct clk_init_data {
	const char		*name;
	const struct clk_ops	*ops;
	/* Only one of the following three should be assigned */
	const char		* const *parent_names;
	const struct clk_parent_data	*parent_data;
	const struct clk_hw		**parent_hws;
	u8			num_parents;
	unsigned long		flags;
};

/**
 * struct clk_hw - handle for traversing from a struct clk to its corresponding
 * hardware-specific structure.  struct clk_hw should be declared within struct
 * clk_foo and then referenced by the struct clk instance that uses struct
 * clk_foo's clk_ops
 *
 * @core: pointer to the struct clk_core instance that points back to this
 * struct clk_hw instance
 *
 * @clk: pointer to the per-user struct clk instance that can be used to call
 * into the clk API
 *
 * @init: pointer to struct clk_init_data that contains the init data shared
 * with the common clock framework. This pointer will be set to NULL once
 * a clk_register() variant is called on this clk_hw pointer.
 */
struct clk_hw {
	struct clk_core *core;
	struct clk *clk;
	const struct clk_init_data *init;
};

/*
 * DOC: Basic clock implementations common to many platforms
 *
 * Each basic clock hardware type is comprised of a structure describing the
 * clock hardware, implementations of the relevant callbacks in struct clk_ops,
 * unique flags for that hardware type, a registration function and an
 * alternative macro for static initialization
 */

/**
 * struct clk_fixed_rate - fixed-rate clock
 * @hw:		handle between common and hardware-specific interfaces
 * @fixed_rate:	constant frequency of clock
 * @fixed_accuracy: constant accuracy of clock in ppb (parts per billion)
 * @flags:	hardware specific flags
 *
 * Flags:
 * * CLK_FIXED_RATE_PARENT_ACCURACY - Use the accuracy of the parent clk
 *                                    instead of what's set in @fixed_accuracy.
 */
struct clk_fixed_rate {
	struct		clk_hw hw;
	unsigned long	fixed_rate;
	unsigned long	fixed_accuracy;
	unsigned long	flags;
};

#define CLK_FIXED_RATE_PARENT_ACCURACY	BIT(0)

extern const struct clk_ops clk_fixed_rate_ops;
struct clk_hw *__clk_hw_register_fixed_rate(struct device *dev,
		struct device_node *np, const char *name,
		const char *parent_name, const struct clk_hw *parent_hw,
		const struct clk_parent_data *parent_data, unsigned long flags,
		unsigned long fixed_rate, unsigned long fixed_accuracy,
		unsigned long clk_fixed_flags, bool devm);
struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		unsigned long fixed_rate);
/**
 * clk_hw_register_fixed_rate - register fixed-rate clock with the clock
 * framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 */
#define clk_hw_register_fixed_rate(dev, name, parent_name, flags, fixed_rate)  \
	__clk_hw_register_fixed_rate((dev), NULL, (name), (parent_name), NULL, \
				     NULL, (flags), (fixed_rate), 0, 0, false)

/**
 * devm_clk_hw_register_fixed_rate - register fixed-rate clock with the clock
 * framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 */
#define devm_clk_hw_register_fixed_rate(dev, name, parent_name, flags, fixed_rate)  \
	__clk_hw_register_fixed_rate((dev), NULL, (name), (parent_name), NULL, \
				     NULL, (flags), (fixed_rate), 0, 0, true)
/**
 * clk_hw_register_fixed_rate_parent_hw - register fixed-rate clock with
 * the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_hw: pointer to parent clk
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 */
#define clk_hw_register_fixed_rate_parent_hw(dev, name, parent_hw, flags,     \
					     fixed_rate)		      \
	__clk_hw_register_fixed_rate((dev), NULL, (name), NULL, (parent_hw),  \
				     NULL, (flags), (fixed_rate), 0, 0, false)
/**
 * clk_hw_register_fixed_rate_parent_data - register fixed-rate clock with
 * the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_data: parent clk data
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 */
#define clk_hw_register_fixed_rate_parent_data(dev, name, parent_data, flags, \
					     fixed_rate)		      \
	__clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL,	      \
				     (parent_data), (flags), (fixed_rate), 0, \
				     0, false)
/**
 * clk_hw_register_fixed_rate_with_accuracy - register fixed-rate clock with
 * the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 * @fixed_accuracy: non-adjustable clock accuracy
 */
#define clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,      \
						 flags, fixed_rate,	      \
						 fixed_accuracy)	      \
	__clk_hw_register_fixed_rate((dev), NULL, (name), (parent_name),      \
				     NULL, NULL, (flags), (fixed_rate),       \
				     (fixed_accuracy), 0, false)
/**
 * clk_hw_register_fixed_rate_with_accuracy_parent_hw - register fixed-rate
 * clock with the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_hw: pointer to parent clk
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 * @fixed_accuracy: non-adjustable clock accuracy
 */
#define clk_hw_register_fixed_rate_with_accuracy_parent_hw(dev, name,	      \
		parent_hw, flags, fixed_rate, fixed_accuracy)		      \
	__clk_hw_register_fixed_rate((dev), NULL, (name), NULL, (parent_hw),  \
				     NULL, (flags), (fixed_rate),	      \
				     (fixed_accuracy), 0, false)
/**
 * clk_hw_register_fixed_rate_with_accuracy_parent_data - register fixed-rate
 * clock with the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_data: name of clock's parent
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 * @fixed_accuracy: non-adjustable clock accuracy
 */
#define clk_hw_register_fixed_rate_with_accuracy_parent_data(dev, name,	      \
		parent_data, flags, fixed_rate, fixed_accuracy)		      \
	__clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL,	      \
				     (parent_data), NULL, (flags),	      \
				     (fixed_rate), (fixed_accuracy), 0, false)
/**
 * clk_hw_register_fixed_rate_parent_accuracy - register fixed-rate clock with
 * the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_data: name of clock's parent
 * @flags: framework-specific flags
 * @fixed_rate: non-adjustable clock rate
 */
#define clk_hw_register_fixed_rate_parent_accuracy(dev, name, parent_data,    \
						   flags, fixed_rate)	      \
	__clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL,      \
				     (parent_data), (flags), (fixed_rate), 0,    \
				     CLK_FIXED_RATE_PARENT_ACCURACY, false)

void clk_unregister_fixed_rate(struct clk *clk);
void clk_hw_unregister_fixed_rate(struct clk_hw *hw);

void of_fixed_clk_setup(struct device_node *np);

/**
 * struct clk_gate - gating clock
 *
 * @hw:		handle between common and hardware-specific interfaces
 * @reg:	register controlling gate
 * @bit_idx:	single bit controlling gate
 * @flags:	hardware-specific flags
 * @lock:	register lock
 *
 * Clock which can gate its output.  Implements .enable & .disable
 *
 * Flags:
 * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
 *	enable the clock.  Setting this flag does the opposite: setting the bit
 *	disable the clock and clearing it enables the clock
 * CLK_GATE_HIWORD_MASK - The gate settings are only in lower 16-bit
 *	of this register, and mask of gate bits are in higher 16-bit of this
 *	register.  While setting the gate bits, higher 16-bit should also be
 *	updated to indicate changing gate bits.
 * CLK_GATE_BIG_ENDIAN - by default little endian register accesses are used for
 *	the gate register.  Setting this flag makes the register accesses big
 *	endian.
 */
struct clk_gate {
	struct clk_hw hw;
	void __iomem	*reg;
	u8		bit_idx;
	u8		flags;
	spinlock_t	*lock;
};

#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)

#define CLK_GATE_SET_TO_DISABLE		BIT(0)
#define CLK_GATE_HIWORD_MASK		BIT(1)
#define CLK_GATE_BIG_ENDIAN		BIT(2)

extern const struct clk_ops clk_gate_ops;
struct clk_hw *__clk_hw_register_gate(struct device *dev,
		struct device_node *np, const char *name,
		const char *parent_name, const struct clk_hw *parent_hw,
		const struct clk_parent_data *parent_data,
		unsigned long flags,
		void __iomem *reg, u8 bit_idx,
		u8 clk_gate_flags, spinlock_t *lock);
struct clk_hw *__devm_clk_hw_register_gate(struct device *dev,
		struct device_node *np, const char *name,
		const char *parent_name, const struct clk_hw *parent_hw,
		const struct clk_parent_data *parent_data,
		unsigned long flags,
		void __iomem *reg, u8 bit_idx,
		u8 clk_gate_flags, spinlock_t *lock);
struct clk *clk_register_gate(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		void __iomem *reg, u8 bit_idx,
		u8 clk_gate_flags, spinlock_t *lock);
/**
 * clk_hw_register_gate - register a gate clock with the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_name: name of this clock's parent
 * @flags: framework-specific flags for this clock
 * @reg: register address to control gating of this clock
 * @bit_idx: which bit in the register controls gating of this clock
 * @clk_gate_flags: gate-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx,     \
			     clk_gate_flags, lock)			      \
	__clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL,      \
			       NULL, (flags), (reg), (bit_idx),		      \
			       (clk_gate_flags), (lock))
/**
 * clk_hw_register_gate_parent_hw - register a gate clock with the clock
 * framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_hw: pointer to parent clk
 * @flags: framework-specific flags for this clock
 * @reg: register address to control gating of this clock
 * @bit_idx: which bit in the register controls gating of this clock
 * @clk_gate_flags: gate-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_gate_parent_hw(dev, name, parent_hw, flags, reg,      \
				       bit_idx, clk_gate_flags, lock)	      \
	__clk_hw_register_gate((dev), NULL, (name), NULL, (parent_hw),        \
			       NULL, (flags), (reg), (bit_idx),		      \
			       (clk_gate_flags), (lock))
/**
 * clk_hw_register_gate_parent_data - register a gate clock with the clock
 * framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_data: parent clk data
 * @flags: framework-specific flags for this clock
 * @reg: register address to control gating of this clock
 * @bit_idx: which bit in the register controls gating of this clock
 * @clk_gate_flags: gate-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_gate_parent_data(dev, name, parent_data, flags, reg,  \
				       bit_idx, clk_gate_flags, lock)	      \
	__clk_hw_register_gate((dev), NULL, (name), NULL, NULL, (parent_data), \
			       (flags), (reg), (bit_idx),		      \
			       (clk_gate_flags), (lock))
/**
 * devm_clk_hw_register_gate - register a gate clock with the clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_name: name of this clock's parent
 * @flags: framework-specific flags for this clock
 * @reg: register address to control gating of this clock
 * @bit_idx: which bit in the register controls gating of this clock
 * @clk_gate_flags: gate-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define devm_clk_hw_register_gate(dev, name, parent_name, flags, reg, bit_idx,\
				  clk_gate_flags, lock)			      \
	__devm_clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \
			       NULL, (flags), (reg), (bit_idx),		      \
			       (clk_gate_flags), (lock))
/**
 * devm_clk_hw_register_gate_parent_data - register a gate clock with the
 * clock framework
 * @dev: device that is registering this clock
 * @name: name of this clock
 * @parent_data: parent clk data
 * @flags: framework-specific flags for this clock
 * @reg: register address to control gating of this clock
 * @bit_idx: which bit in the register controls gating of this clock
 * @clk_gate_flags: gate-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define devm_clk_hw_register_gate_parent_data(dev, name, parent_data, flags,  \
					      reg, bit_idx, clk_gate_flags,   \
					      lock)			      \
	__devm_clk_hw_register_gate((dev), NULL, (name), NULL, NULL,	      \
				    (parent_data), (flags), (reg), (bit_idx), \
				    (clk_gate_flags), (lock))

void clk_unregister_gate(struct clk *clk);
void clk_hw_unregister_gate(struct clk_hw *hw);
int clk_gate_is_enabled(struct clk_hw *hw);

struct clk_div_table {
	unsigned int	val;
	unsigned int	div;
};

/**
 * struct clk_divider - adjustable divider clock
 *
 * @hw:		handle between common and hardware-specific interfaces
 * @reg:	register containing the divider
 * @shift:	shift to the divider bit field
 * @width:	width of the divider bit field
 * @table:	array of value/divider pairs, last entry should have div = 0
 * @lock:	register lock
 *
 * Clock with an adjustable divider affecting its output frequency.  Implements
 * .recalc_rate, .set_rate and .round_rate
 *
 * @flags:
 * CLK_DIVIDER_ONE_BASED - by default the divisor is the value read from the
 *	register plus one.  If CLK_DIVIDER_ONE_BASED is set then the divider is
 *	the raw value read from the register, with the value of zero considered
 *	invalid, unless CLK_DIVIDER_ALLOW_ZERO is set.
 * CLK_DIVIDER_POWER_OF_TWO - clock divisor is 2 raised to the value read from
 *	the hardware register
 * CLK_DIVIDER_ALLOW_ZERO - Allow zero divisors.  For dividers which have
 *	CLK_DIVIDER_ONE_BASED set, it is possible to end up with a zero divisor.
 *	Some hardware implementations gracefully handle this case and allow a
 *	zero divisor by not modifying their input clock
 *	(divide by one / bypass).
 * CLK_DIVIDER_HIWORD_MASK - The divider settings are only in lower 16-bit
 *	of this register, and mask of divider bits are in higher 16-bit of this
 *	register.  While setting the divider bits, higher 16-bit should also be
 *	updated to indicate changing divider bits.
 * CLK_DIVIDER_ROUND_CLOSEST - Makes the best calculated divider to be rounded
 *	to the closest integer instead of the up one.
 * CLK_DIVIDER_READ_ONLY - The divider settings are preconfigured and should
 *	not be changed by the clock framework.
 * CLK_DIVIDER_MAX_AT_ZERO - For dividers which are like CLK_DIVIDER_ONE_BASED
 *	except when the value read from the register is zero, the divisor is
 *	2^width of the field.
 * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used
 *	for the divider register.  Setting this flag makes the register accesses
 *	big endian.
 */
struct clk_divider {
	struct clk_hw	hw;
	void __iomem	*reg;
	u8		shift;
	u8		width;
	u8		flags;
	const struct clk_div_table	*table;
	spinlock_t	*lock;
};

#define clk_div_mask(width)	((1 << (width)) - 1)
#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)

#define CLK_DIVIDER_ONE_BASED		BIT(0)
#define CLK_DIVIDER_POWER_OF_TWO	BIT(1)
#define CLK_DIVIDER_ALLOW_ZERO		BIT(2)
#define CLK_DIVIDER_HIWORD_MASK		BIT(3)
#define CLK_DIVIDER_ROUND_CLOSEST	BIT(4)
#define CLK_DIVIDER_READ_ONLY		BIT(5)
#define CLK_DIVIDER_MAX_AT_ZERO		BIT(6)
#define CLK_DIVIDER_BIG_ENDIAN		BIT(7)

extern const struct clk_ops clk_divider_ops;
extern const struct clk_ops clk_divider_ro_ops;

unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
		unsigned int val, const struct clk_div_table *table,
		unsigned long flags, unsigned long width);
long divider_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
			       unsigned long rate, unsigned long *prate,
			       const struct clk_div_table *table,
			       u8 width, unsigned long flags);
long divider_ro_round_rate_parent(struct clk_hw *hw, struct clk_hw *parent,
				  unsigned long rate, unsigned long *prate,
				  const struct clk_div_table *table, u8 width,
				  unsigned long flags, unsigned int val);
int divider_determine_rate(struct clk_hw *hw, struct clk_rate_request *req,
			   const struct clk_div_table *table, u8 width,
			   unsigned long flags);
int divider_ro_determine_rate(struct clk_hw *hw, struct clk_rate_request *req,
			      const struct clk_div_table *table, u8 width,
			      unsigned long flags, unsigned int val);
int divider_get_val(unsigned long rate, unsigned long parent_rate,
		const struct clk_div_table *table, u8 width,
		unsigned long flags);

struct clk_hw *__clk_hw_register_divider(struct device *dev,
		struct device_node *np, const char *name,
		const char *parent_name, const struct clk_hw *parent_hw,
		const struct clk_parent_data *parent_data, unsigned long flags,
		void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
		const struct clk_div_table *table, spinlock_t *lock);
struct clk_hw *__devm_clk_hw_register_divider(struct device *dev,
		struct device_node *np, const char *name,
		const char *parent_name, const struct clk_hw *parent_hw,
		const struct clk_parent_data *parent_data, unsigned long flags,
		void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
		const struct clk_div_table *table, spinlock_t *lock);
struct clk *clk_register_divider_table(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		void __iomem *reg, u8 shift, u8 width,
		u8 clk_divider_flags, const struct clk_div_table *table,
		spinlock_t *lock);
/**
 * clk_register_divider - register a divider clock with the clock framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, \
			     clk_divider_flags, lock)			       \
	clk_register_divider_table((dev), (name), (parent_name), (flags),      \
				   (reg), (shift), (width),		       \
				   (clk_divider_flags), NULL, (lock))
/**
 * clk_hw_register_divider - register a divider clock with the clock framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_divider(dev, name, parent_name, flags, reg, shift,    \
				width, clk_divider_flags, lock)		      \
	__clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL,   \
				  NULL, (flags), (reg), (shift), (width),     \
				  (clk_divider_flags), NULL, (lock))
/**
 * clk_hw_register_divider_parent_hw - register a divider clock with the clock
 * framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_hw: pointer to parent clk
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags, reg,   \
					  shift, width, clk_divider_flags,    \
					  lock)				      \
	__clk_hw_register_divider((dev), NULL, (name), NULL, (parent_hw),     \
				  NULL, (flags), (reg), (shift), (width),     \
				  (clk_divider_flags), NULL, (lock))
/**
 * clk_hw_register_divider_parent_data - register a divider clock with the clock
 * framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_data: parent clk data
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_divider_parent_data(dev, name, parent_data, flags,    \
					    reg, shift, width,		      \
					    clk_divider_flags, lock)	      \
	__clk_hw_register_divider((dev), NULL, (name), NULL, NULL,	      \
				  (parent_data), (flags), (reg), (shift),     \
				  (width), (clk_divider_flags), NULL, (lock))
/**
 * clk_hw_register_divider_table - register a table based divider clock with
 * the clock framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @table: array of divider/value pairs ending with a div set to 0
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_divider_table(dev, name, parent_name, flags, reg,     \
				      shift, width, clk_divider_flags, table, \
				      lock)				      \
	__clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL,   \
				  NULL, (flags), (reg), (shift), (width),     \
				  (clk_divider_flags), (table), (lock))
/**
 * clk_hw_register_divider_table_parent_hw - register a table based divider
 * clock with the clock framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_hw: pointer to parent clk
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @table: array of divider/value pairs ending with a div set to 0
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_divider_table_parent_hw(dev, name, parent_hw, flags,  \
						reg, shift, width,	      \
						clk_divider_flags, table,     \
						lock)			      \
	__clk_hw_register_divider((dev), NULL, (name), NULL, (parent_hw),     \
				  NULL, (flags), (reg), (shift), (width),     \
				  (clk_divider_flags), (table), (lock))
/**
 * clk_hw_register_divider_table_parent_data - register a table based divider
 * clock with the clock framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_data: parent clk data
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @table: array of divider/value pairs ending with a div set to 0
 * @lock: shared register lock for this clock
 */
#define clk_hw_register_divider_table_parent_data(dev, name, parent_data,     \
						  flags, reg, shift, width,   \
						  clk_divider_flags, table,   \
						  lock)			      \
	__clk_hw_register_divider((dev), NULL, (name), NULL, NULL,	      \
				  (parent_data), (flags), (reg), (shift),     \
				  (width), (clk_divider_flags), (table),      \
				  (lock))
/**
 * devm_clk_hw_register_divider - register a divider clock with the clock framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define devm_clk_hw_register_divider(dev, name, parent_name, flags, reg, shift,    \
				width, clk_divider_flags, lock)		      \
	__devm_clk_hw_register_divider((dev), NULL, (name), (parent_name), NULL,   \
				  NULL, (flags), (reg), (shift), (width),     \
				  (clk_divider_flags), NULL, (lock))
/**
 * devm_clk_hw_register_divider_parent_hw - register a divider clock with the clock framework
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_hw: pointer to parent clk
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @lock: shared register lock for this clock
 */
#define devm_clk_hw_register_divider_parent_hw(dev, name, parent_hw, flags,   \
					       reg, shift, width,	      \
					       clk_divider_flags, lock)       \
	__devm_clk_hw_register_divider((dev), NULL, (name), NULL,	      \
				       (parent_hw), NULL, (flags), (reg),     \
				       (shift), (width), (clk_divider_flags), \
				       NULL, (lock))
/**
 * devm_clk_hw_register_divider_table - register a table based divider clock
 * with the clock framework (devres variant)
 * @dev: device registering this clock
 * @name: name of this clock
 * @parent_name: name of clock's parent
 * @flags: framework-specific flags
 * @reg: register address to adjust divider
 * @shift: number of bits to shift the bitfield
 * @width: width of the bitfield
 * @clk_divider_flags: divider-specific flags for this clock
 * @table: array of divider/value pairs ending with a div set to 0
 * @lock: shared register lock for this clock
 */
#define devm_clk_hw_register_divider_table(dev, name, parent_name, flags,     \
					   reg, shift, width,		      \
					   clk_divider_flags, table, lock)    \
	__devm_clk_hw_register_divider((dev), NULL, (name), (parent_name),    \
				       NULL, NULL, (flags), (reg), (shift),   \
				       (width), (clk_divider_flags), (table), \
				       (lock))

void clk_unregister_divider(struct clk *clk);
void clk_hw_unregister_divider(struct clk_hw *hw);

/**
 * struct clk_mux - multiplexer clock
 *
 * @hw:		handle between common and hardware-specific interfaces
 * @reg:	register controlling multiplexer
 * @table:	array of register values corresponding to the parent index
 * @shift:	shift to multiplexer bit field
 * @mask:	mask of mutliplexer bit field
 * @flags:	hardware-specific flags
 * @lock:	register lock
 *
 * Clock with multiple selectable parents.  Implements .get_parent, .set_parent
 * and .recalc_rate
 *
 * Flags:
 * CLK_MUX_INDEX_ONE - register index starts at 1, not 0
 * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
 * CLK_MUX_HIWORD_MASK - The mux settings are only in lower 16-bit of this
 *	register, and mask of mux bits are in higher 16-bit of this register.
 *	While setting the mux bits, higher 16-bit should also be updated to
 *	indicate changing mux bits.
 * CLK_MUX_READ_ONLY - The mux registers can't be written, only read in the
 * 	.get_parent clk_op.
 * CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired
 *	frequency.
 * CLK_MUX_BIG_ENDIAN - By default little endian register accesses are used for
 *	the mux register.  Setting this flag makes the register accesses big
 *	endian.
 */
struct clk_mux {
	struct clk_hw	hw;
	void __iomem	*reg;
	const u32	*table;
	u32		mask;
	u8		shift;
	u8		flags;
	spinlock_t	*lock;
};

#define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw)

#define CLK_MUX_INDEX_ONE		BIT(0)
#define CLK_MUX_INDEX_BIT		BIT(1)
#define CLK_MUX_HIWORD_MASK		BIT(2)
#define CLK_MUX_READ_ONLY		BIT(3) /* mux can't be changed */
#define CLK_MUX_ROUND_CLOSEST		BIT(4)
#define CLK_MUX_BIG_ENDIAN		BIT(5)

extern const struct clk_ops clk_mux_ops;
extern const struct clk_ops clk_mux_ro_ops;

struct clk_hw *__clk_hw_register_mux(struct device *dev, struct device_node *np,
		const char *name, u8 num_parents,
		const char * const *parent_names,
		const struct clk_hw **parent_hws,
		const struct clk_parent_data *parent_data,
		unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
		u8 clk_mux_flags, const u32 *table, spinlock_t *lock);
struct clk_hw *__devm_clk_hw_register_mux(struct device *dev, struct device_node *np,
		const char *name, u8 num_parents,
		const char * const *parent_names,
		const struct clk_hw **parent_hws,
		const struct clk_parent_data *parent_data,
		unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
		u8 clk_mux_flags, const u32 *table, spinlock_t *lock);
struct clk *clk_register_mux_table(struct device *dev, const char *name,
		const char * const *parent_names, u8 num_parents,
		unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
		u8 clk_mux_flags, const u32 *table, spinlock_t *lock);

#define clk_register_mux(dev, name, parent_names, num_parents, flags, reg,    \
			 shift, width, clk_mux_flags, lock)		      \
	clk_register_mux_table((dev), (name), (parent_names), (num_parents),  \
			       (flags), (reg), (shift), BIT((width)) - 1,     \
			       (clk_mux_flags), NULL, (lock))
#define clk_hw_register_mux_table(dev, name, parent_names, num_parents,	      \
				  flags, reg, shift, mask, clk_mux_flags,     \
				  table, lock)				      \
	__clk_hw_register_mux((dev), NULL, (name), (num_parents),	      \
			      (parent_names), NULL, NULL, (flags), (reg),     \
			      (shift), (mask), (clk_mux_flags), (table),      \
			      (lock))
#define clk_hw_register_mux_table_parent_data(dev, name, parent_data,	      \
				  num_parents, flags, reg, shift, mask,	      \
				  clk_mux_flags, table, lock)		      \
	__clk_hw_register_mux((dev), NULL, (name), (num_parents),	      \
			      NULL, NULL, (parent_data), (flags), (reg),      \
			      (shift), (mask), (clk_mux_flags), (table),      \
			      (lock))
#define clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \
			    shift, width, clk_mux_flags, lock)		      \
	__clk_hw_register_mux((dev), NULL, (name), (num_parents),	      \
			      (parent_names), NULL, NULL, (flags), (reg),     \
			      (shift), BIT((width)) - 1, (clk_mux_flags),     \
			      NULL, (lock))
#define clk_hw_register_mux_hws(dev, name, parent_hws, num_parents, flags,    \
				reg, shift, width, clk_mux_flags, lock)	      \
	__clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL,	      \
			      (parent_hws), NULL, (flags), (reg), (shift),    \
			      BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
#define clk_hw_register_mux_parent_data(dev, name, parent_data, num_parents,  \
					flags, reg, shift, width,	      \
					clk_mux_flags, lock)		      \
	__clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, \
			      (parent_data), (flags), (reg), (shift),	      \
			      BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
#define clk_hw_register_mux_parent_data_table(dev, name, parent_data,	      \
					      num_parents, flags, reg, shift, \
					      width, clk_mux_flags, table,    \
					      lock)			      \
	__clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, \
			      (parent_data), (flags), (reg), (shift),	      \
			      BIT((width)) - 1, (clk_mux_flags), table, (lock))
#define devm_clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \
			    shift, width, clk_mux_flags, lock)		      \
	__devm_clk_hw_register_mux((dev), NULL, (name), (num_parents),	      \
			      (parent_names), NULL, NULL, (flags), (reg),     \
			      (shift), BIT((width)) - 1, (clk_mux_flags),     \
			      NULL, (lock))
#define devm_clk_hw_register_mux_parent_hws(dev, name, parent_hws,	      \
					    num_parents, flags, reg, shift,   \
					    width, clk_mux_flags, lock)       \
	__devm_clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL,  \
				   (parent_hws), NULL, (flags), (reg),        \
				   (shift), BIT((width)) - 1,		      \
				   (clk_mux_flags), NULL, (lock))
#define devm_clk_hw_register_mux_parent_data_table(dev, name, parent_data,    \
					      num_parents, flags, reg, shift, \
					      width, clk_mux_flags, table,    \
					      lock)			      \
	__devm_clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL,  \
			      NULL, (parent_data), (flags), (reg), (shift),   \
			      BIT((width)) - 1, (clk_mux_flags), table, (lock))

int clk_mux_val_to_index(struct clk_hw *hw, const u32 *table, unsigned int flags,
			 unsigned int val);
unsigned int clk_mux_index_to_val(const u32 *table, unsigned int flags, u8 index);

void clk_unregister_mux(struct clk *clk);
void clk_hw_unregister_mux(struct clk_hw *hw);

void of_fixed_factor_clk_setup(struct device_node *node);

/**
 * struct clk_fixed_factor - fixed multiplier and divider clock
 *
 * @hw:		handle between common and hardware-specific interfaces
 * @mult:	multiplier
 * @div:	divider
 *
 * Clock with a fixed multiplier and divider. The output frequency is the
 * parent clock rate divided by div and multiplied by mult.
 * Implements .recalc_rate, .set_rate and .round_rate
 */

struct clk_fixed_factor {
	struct clk_hw	hw;
	unsigned int	mult;
	unsigned int	div;
};

#define to_clk_fixed_factor(_hw) container_of(_hw, struct clk_fixed_factor, hw)

extern const struct clk_ops clk_fixed_factor_ops;
struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
		const char *parent_name, unsigned long flags,
		unsigned int mult, unsigned int div);
void clk_unregister_fixed_factor(struct clk *clk);
struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
		const char *name, const char *parent_name, unsigned long flags,
		unsigned int mult, unsigned int div);
void clk_hw_unregister_fixed_factor(struct clk_hw *hw);
struct clk_hw *devm_clk_hw_register_fixed_factor(struct device *dev,
		const char *name, const char *parent_name, unsigned long flags,
		unsigned int mult, unsigned int div);
struct clk_hw *devm_clk_hw_register_fixed_factor_index(struct device *dev,
		const char *name, unsigned int index, unsigned long flags,
		unsigned int mult, unsigned int div);

struct clk_hw *devm_clk_hw_register_fixed_factor_parent_hw(struct device *dev,
		const char *name, const struct clk_hw *parent_hw,
		unsigned long flags, unsigned int mult, unsigned int div);

struct clk_hw *clk_hw_register_fixed_factor_parent_hw(struct device *dev,
		const char *name, const struct clk_hw *parent_hw,
		unsigned long flags, unsigned int mult, unsigned int div);
/**
 * struct clk_fractional_divider - adjustable fractional divider clock
 *
 * @hw:		handle between common and hardware-specific interfaces
 * @reg:	register containing the divider
 * @mshift:	shift to the numerator bit field
 * @mwidth:	width of the numerator bit field
 * @nshift:	shift to the denominator bit field
 * @nwidth:	width of the denominator bit field
 * @approximation: clk driver's callback for calculating the divider clock
 * @lock:	register lock
 *
 * Clock with adjustable fractional divider affecting its output frequency.
 *
 * @flags:
 * CLK_FRAC_DIVIDER_ZERO_BASED - by default the numerator and denominator
 *	is the value read from the register. If CLK_FRAC_DIVIDER_ZERO_BASED
 *	is set then the numerator and denominator are both the value read
 *	plus one.
 * CLK_FRAC_DIVIDER_BIG_ENDIAN - By default little endian register accesses are
 *	used for the divider register.  Setting this flag makes the register
 *	accesses big endian.
 * CLK_FRAC_DIVIDER_POWER_OF_TWO_PS - By default the resulting fraction might
 *	be saturated and the caller will get quite far from the good enough
 *	approximation. Instead the caller may require, by setting this flag,
 *	to shift left by a few bits in case, when the asked one is quite small
 *	to satisfy the desired range of denominator. It assumes that on the
 *	caller's side the power-of-two capable prescaler exists.
 */
struct clk_fractional_divider {
	struct clk_hw	hw;
	void __iomem	*reg;
	u8		mshift;
	u8		mwidth;
	u8		nshift;
	u8		nwidth;
	u8		flags;
	void		(*approximation)(struct clk_hw *hw,
				unsigned long rate, unsigned long *parent_rate,
				unsigned long *m, unsigned long *n);
	spinlock_t	*lock;
};

#define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw)

#define CLK_FRAC_DIVIDER_ZERO_BASED		BIT(0)
#define CLK_FRAC_DIVIDER_BIG_ENDIAN		BIT(1)
#define CLK_FRAC_DIVIDER_POWER_OF_TWO_PS	BIT(2)

struct clk *clk_register_fractional_divider(struct device *dev,
		const char *name, const char *parent_name, unsigned long flags,
		void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
		u8 clk_divider_flags, spinlock_t *lock);
struct clk_hw *clk_hw_register_fractional_divider(struct device *dev,
		const char *name, const char *parent_name, unsigned long flags,
		void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
		u8 clk_divider_flags, spinlock_t *lock);
void clk_hw_unregister_fractional_divider(struct clk_hw *hw);

/**
 * struct clk_multiplier - adjustable multiplier clock
 *
 * @hw:		handle between common and hardware-specific interfaces
 * @reg:	register containing the multiplier
 * @shift:	shift to the multiplier bit field
 * @width:	width of the multiplier bit field
 * @lock:	register lock
 *
 * Clock with an adjustable multiplier affecting its output frequency.
 * Implements .recalc_rate, .set_rate and .round_rate
 *
 * @flags:
 * CLK_MULTIPLIER_ZERO_BYPASS - By default, the multiplier is the value read
 *	from the register, with 0 being a valid value effectively
 *	zeroing the output clock rate. If CLK_MULTIPLIER_ZERO_BYPASS is
 *	set, then a null multiplier will be considered as a bypass,
 *	leaving the parent rate unmodified.
 * CLK_MULTIPLIER_ROUND_CLOSEST - Makes the best calculated divider to be
 *	rounded to the closest integer instead of the down one.
 * CLK_MULTIPLIER_BIG_ENDIAN - By default little endian register accesses are
 *	used for the multiplier register.  Setting this flag makes the register
 *	accesses big endian.
 */
struct clk_multiplier {
	struct clk_hw	hw;
	void __iomem	*reg;
	u8		shift;
	u8		width;
	u8		flags;
	spinlock_t	*lock;
};

#define to_clk_multiplier(_hw) container_of(_hw, struct clk_multiplier, hw)

#define CLK_MULTIPLIER_ZERO_BYPASS	BIT(0)
#define CLK_MULTIPLIER_ROUND_CLOSEST	BIT(1)
#define CLK_MULTIPLIER_BIG_ENDIAN	BIT(2)

extern const struct clk_ops clk_multiplier_ops;

/***
 * struct clk_composite - aggregate clock of mux, divider and gate clocks
 *
 * @hw:		handle between common and hardware-specific interfaces
 * @mux_hw:	handle between composite and hardware-specific mux clock
 * @rate_hw:	handle between composite and hardware-specific rate clock
 * @gate_hw:	handle between composite and hardware-specific gate clock
 * @mux_ops:	clock ops for mux
 * @rate_ops:	clock ops for rate
 * @gate_ops:	clock ops for gate
 */
struct clk_composite {
	struct clk_hw	hw;
	struct clk_ops	ops;

struct clk_hw	*mux_hw;
	struct clk_hw	*rate_hw;
	struct clk_hw	*gate_hw;

const struct clk_ops	*mux_ops;
	const struct clk_ops	*rate_ops;
	const struct clk_ops	*gate_ops;
};

#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)

struct clk *clk_register_composite(struct device *dev, const char *name,
		const char * const *parent_names, int num_parents,
		struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
		struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
		struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
		unsigned long flags);
struct clk *clk_register_composite_pdata(struct device *dev, const char *name,
		const struct clk_parent_data *parent_data, int num_parents,
		struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
		struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
		struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
		unsigned long flags);
void clk_unregister_composite(struct clk *clk);
struct clk_hw *clk_hw_register_composite(struct device *dev, const char *name,
		const char * const *parent_names, int num_parents,
		struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
		struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
		struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
		unsigned long flags);
struct clk_hw *clk_hw_register_composite_pdata(struct device *dev,
		const char *name,
		const struct clk_parent_data *parent_data, int num_parents,
		struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
		struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
		struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
		unsigned long flags);
struct clk_hw *devm_clk_hw_register_composite_pdata(struct device *dev,
		const char *name, const struct clk_parent_data *parent_data,
		int num_parents,
		struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
		struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
		struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
		unsigned long flags);
void clk_hw_unregister_composite(struct clk_hw *hw);

struct clk *clk_register(struct device *dev, struct clk_hw *hw);
struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw);

int __must_check clk_hw_register(struct device *dev, struct clk_hw *hw);
int __must_check devm_clk_hw_register(struct device *dev, struct clk_hw *hw);
int __must_check of_clk_hw_register(struct device_node *node, struct clk_hw *hw);

void clk_unregister(struct clk *clk);

void clk_hw_unregister(struct clk_hw *hw);

/* helper functions */
const char *__clk_get_name(const struct clk *clk);
const char *clk_hw_get_name(const struct clk_hw *hw);
#ifdef CONFIG_COMMON_CLK
struct clk_hw *__clk_get_hw(struct clk *clk);
#else
static inline struct clk_hw *__clk_get_hw(struct clk *clk)
{
	return (struct clk_hw *)clk;
}
#endif

struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id);
struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw,
				const char *con_id);

unsigned int clk_hw_get_num_parents(const struct clk_hw *hw);
struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw);
struct clk_hw *clk_hw_get_parent_by_index(const struct clk_hw *hw,
					  unsigned int index);
int clk_hw_get_parent_index(struct clk_hw *hw);
int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *new_parent);
unsigned int __clk_get_enable_count(struct clk *clk);
unsigned long clk_hw_get_rate(const struct clk_hw *hw);
unsigned long clk_hw_get_flags(const struct clk_hw *hw);
#define clk_hw_can_set_rate_parent(hw) \
	(clk_hw_get_flags((hw)) & CLK_SET_RATE_PARENT)

bool clk_hw_is_prepared(const struct clk_hw *hw);
bool clk_hw_rate_is_protected(const struct clk_hw *hw);
bool clk_hw_is_enabled(const struct clk_hw *hw);
bool __clk_is_enabled(struct clk *clk);
struct clk *__clk_lookup(const char *name);
int __clk_mux_determine_rate(struct clk_hw *hw,
			     struct clk_rate_request *req);
int __clk_determine_rate(struct clk_hw *core, struct clk_rate_request *req);
int __clk_mux_determine_rate_closest(struct clk_hw *hw,
				     struct clk_rate_request *req);
int clk_mux_determine_rate_flags(struct clk_hw *hw,
				 struct clk_rate_request *req,
				 unsigned long flags);
int clk_hw_determine_rate_no_reparent(struct clk_hw *hw,
				      struct clk_rate_request *req);
void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent);
void clk_hw_get_rate_range(struct clk_hw *hw, unsigned long *min_rate,
			   unsigned long *max_rate);
void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
			   unsigned long max_rate);

static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src)
{
	dst->clk = src->clk;
	dst->core = src->core;
}

static inline long divider_round_rate(struct clk_hw *hw, unsigned long rate,
				      unsigned long *prate,
				      const struct clk_div_table *table,
				      u8 width, unsigned long flags)
{
	return divider_round_rate_parent(hw, clk_hw_get_parent(hw),
					 rate, prate, table, width, flags);
}

static inline long divider_ro_round_rate(struct clk_hw *hw, unsigned long rate,
					 unsigned long *prate,
					 const struct clk_div_table *table,
					 u8 width, unsigned long flags,
					 unsigned int val)
{
	return divider_ro_round_rate_parent(hw, clk_hw_get_parent(hw),
					    rate, prate, table, width, flags,
					    val);
}

/*
 * FIXME clock api without lock protection
 */
unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate);

struct clk_onecell_data {
	struct clk **clks;
	unsigned int clk_num;
};

struct clk_hw_onecell_data {
	unsigned int num;
	struct clk_hw *hws[] __counted_by(num);
};

#define CLK_OF_DECLARE(name, compat, fn) \
	static void __init __##name##_of_clk_init_declare(struct device_node *np) \
	{								\
		fn(np);							\
		fwnode_dev_initialized(of_fwnode_handle(np), true);	\
	}								\
	OF_DECLARE_1(clk, name, compat, __##name##_of_clk_init_declare)

/*
 * Use this macro when you have a driver that requires two initialization
 * routines, one at of_clk_init(), and one at platform device probe
 */
#define CLK_OF_DECLARE_DRIVER(name, compat, fn) \
	static void __init name##_of_clk_init_driver(struct device_node *np) \
	{								\
		of_node_clear_flag(np, OF_POPULATED);			\
		fn(np);							\
	}								\
	OF_DECLARE_1(clk, name, compat, name##_of_clk_init_driver)

#define CLK_HW_INIT(_name, _parent, _ops, _flags)		\
	(&(struct clk_init_data) {				\
		.flags		= _flags,			\
		.name		= _name,			\
		.parent_names	= (const char *[]) { _parent },	\
		.num_parents	= 1,				\
		.ops		= _ops,				\
	})

#define CLK_HW_INIT_HW(_name, _parent, _ops, _flags)			\
	(&(struct clk_init_data) {					\
		.flags		= _flags,				\
		.name		= _name,				\
		.parent_hws	= (const struct clk_hw*[]) { _parent },	\
		.num_parents	= 1,					\
		.ops		= _ops,					\
	})

/*
 * This macro is intended for drivers to be able to share the otherwise
 * individual struct clk_hw[] compound literals created by the compiler
 * when using CLK_HW_INIT_HW. It does NOT support multiple parents.
 */
#define CLK_HW_INIT_HWS(_name, _parent, _ops, _flags)			\
	(&(struct clk_init_data) {					\
		.flags		= _flags,				\
		.name		= _name,				\
		.parent_hws	= _parent,				\
		.num_parents	= 1,					\
		.ops		= _ops,					\
	})

#define CLK_HW_INIT_FW_NAME(_name, _parent, _ops, _flags)		\
	(&(struct clk_init_data) {					\
		.flags		= _flags,				\
		.name		= _name,				\
		.parent_data	= (const struct clk_parent_data[]) {	\
					{ .fw_name = _parent },		\
				  },					\
		.num_parents	= 1,					\
		.ops		= _ops,					\
	})

#define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags)	\
	(&(struct clk_init_data) {				\
		.flags		= _flags,			\
		.name		= _name,			\
		.parent_names	= _parents,			\
		.num_parents	= ARRAY_SIZE(_parents),		\
		.ops		= _ops,				\
	})

#define CLK_HW_INIT_PARENTS_HW(_name, _parents, _ops, _flags)	\
	(&(struct clk_init_data) {				\
		.flags		= _flags,			\
		.name		= _name,			\
		.parent_hws	= _parents,			\
		.num_parents	= ARRAY_SIZE(_parents),		\
		.ops		= _ops,				\
	})

#define CLK_HW_INIT_PARENTS_DATA(_name, _parents, _ops, _flags)	\
	(&(struct clk_init_data) {				\
		.flags		= _flags,			\
		.name		= _name,			\
		.parent_data	= _parents,			\
		.num_parents	= ARRAY_SIZE(_parents),		\
		.ops		= _ops,				\
	})

#define CLK_HW_INIT_NO_PARENT(_name, _ops, _flags)	\
	(&(struct clk_init_data) {			\
		.flags          = _flags,		\
		.name           = _name,		\
		.parent_names   = NULL,			\
		.num_parents    = 0,			\
		.ops            = _ops,			\
	})

#define CLK_FIXED_FACTOR(_struct, _name, _parent,			\
			_div, _mult, _flags)				\
	struct clk_fixed_factor _struct = {				\
		.div		= _div,					\
		.mult		= _mult,				\
		.hw.init	= CLK_HW_INIT(_name,			\
					      _parent,			\
					      &clk_fixed_factor_ops,	\
					      _flags),			\
	}

#define CLK_FIXED_FACTOR_HW(_struct, _name, _parent,			\
			    _div, _mult, _flags)			\
	struct clk_fixed_factor _struct = {				\
		.div		= _div,					\
		.mult		= _mult,				\
		.hw.init	= CLK_HW_INIT_HW(_name,			\
						 _parent,		\
						 &clk_fixed_factor_ops,	\
						 _flags),		\
	}

/*
 * This macro allows the driver to reuse the _parent array for multiple
 * fixed factor clk declarations.
 */
#define CLK_FIXED_FACTOR_HWS(_struct, _name, _parent,			\
			     _div, _mult, _flags)			\
	struct clk_fixed_factor _struct = {				\
		.div		= _div,					\
		.mult		= _mult,				\
		.hw.init	= CLK_HW_INIT_HWS(_name,		\
						  _parent,		\
						  &clk_fixed_factor_ops, \
						  _flags),	\
	}

#define CLK_FIXED_FACTOR_FW_NAME(_struct, _name, _parent,		\
				 _div, _mult, _flags)			\
	struct clk_fixed_factor _struct = {				\
		.div		= _div,					\
		.mult		= _mult,				\
		.hw.init	= CLK_HW_INIT_FW_NAME(_name,		\
						      _parent,		\
						      &clk_fixed_factor_ops, \
						      _flags),		\
	}

#ifdef CONFIG_OF
int of_clk_add_provider(struct device_node *np,
			struct clk *(*clk_src_get)(struct of_phandle_args *args,
						   void *data),
			void *data);
int of_clk_add_hw_provider(struct device_node *np,
			   struct clk_hw *(*get)(struct of_phandle_args *clkspec,
						 void *data),
			   void *data);
int devm_of_clk_add_hw_provider(struct device *dev,
			   struct clk_hw *(*get)(struct of_phandle_args *clkspec,
						 void *data),
			   void *data);
void of_clk_del_provider(struct device_node *np);

struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
				  void *data);
struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec,
				    void *data);
struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data);
struct clk_hw *of_clk_hw_onecell_get(struct of_phandle_args *clkspec,
				     void *data);
int of_clk_parent_fill(struct device_node *np, const char **parents,
		       unsigned int size);
int of_clk_detect_critical(struct device_node *np, int index,
			    unsigned long *flags);

#else /* !CONFIG_OF */

static inline int of_clk_add_provider(struct device_node *np,
			struct clk *(*clk_src_get)(struct of_phandle_args *args,
						   void *data),
			void *data)
{
	return 0;
}
static inline int of_clk_add_hw_provider(struct device_node *np,
			struct clk_hw *(*get)(struct of_phandle_args *clkspec,
					      void *data),
			void *data)
{
	return 0;
}
static inline int devm_of_clk_add_hw_provider(struct device *dev,
			   struct clk_hw *(*get)(struct of_phandle_args *clkspec,
						 void *data),
			   void *data)
{
	return 0;
}
static inline void of_clk_del_provider(struct device_node *np) {}

static inline struct clk *of_clk_src_simple_get(
	struct of_phandle_args *clkspec, void *data)
{
	return ERR_PTR(-ENOENT);
}
static inline struct clk_hw *
of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
{
	return ERR_PTR(-ENOENT);
}
static inline struct clk *of_clk_src_onecell_get(
	struct of_phandle_args *clkspec, void *data)
{
	return ERR_PTR(-ENOENT);
}
static inline struct clk_hw *
of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
{
	return ERR_PTR(-ENOENT);
}
static inline int of_clk_parent_fill(struct device_node *np,
				     const char **parents, unsigned int size)
{
	return 0;
}
static inline int of_clk_detect_critical(struct device_node *np, int index,
					  unsigned long *flags)
{
	return 0;
}
#endif /* CONFIG_OF */

void clk_gate_restore_context(struct clk_hw *hw);

#endif /* CLK_PROVIDER_H */