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Name	Size	Permission	Date
atmel_lcdc.h	6.15 KB	-rw-r--r--	2024-03-10 20:38
aty128.h	13.27 KB	-rw-r--r--	2024-03-10 20:38
broadsheetfb.h	2.12 KB	-rw-r--r--	2024-03-10 20:38
cirrus.h	5.67 KB	-rw-r--r--	2024-03-10 20:38
cmdline.h	444 B	-rw-r--r--	2024-03-10 20:38
cvisionppc.h	1.54 KB	-rw-r--r--	2024-03-10 20:38
da8xx-fb.h	1.96 KB	-rw-r--r--	2024-03-10 20:38
display_timing.h	3.11 KB	-rw-r--r--	2024-03-10 20:38
edid.h	228 B	-rw-r--r--	2024-03-10 20:38
gbe.h	10.44 KB	-rw-r--r--	2024-03-10 20:38
hecubafb.h	1.5 KB	-rw-r--r--	2024-03-10 20:38
ili9320.h	5.66 KB	-rw-r--r--	2024-03-10 20:38
imx-ipu-image-convert.h	6.53 KB	-rw-r--r--	2024-03-10 20:38
imx-ipu-v3.h	16.38 KB	-rw-r--r--	2024-03-10 20:38
kyro.h	1.97 KB	-rw-r--r--	2024-03-10 20:38
mach64.h	46.93 KB	-rw-r--r--	2024-03-10 20:38
maxinefb.h	1.24 KB	-rw-r--r--	2024-03-10 20:38
metronomefb.h	1.48 KB	-rw-r--r--	2024-03-10 20:38
mipi_display.h	4.96 KB	-rw-r--r--	2024-03-10 20:38
mmp_disp.h	7.04 KB	-rw-r--r--	2024-03-10 20:38
neomagic.h	4.9 KB	-rw-r--r--	2024-03-10 20:38
newport.h	18.68 KB	-rw-r--r--	2024-03-10 20:38
nomodeset.h	137 B	-rw-r--r--	2024-03-10 20:38
of_display_timing.h	814 B	-rw-r--r--	2024-03-10 20:38
of_videomode.h	367 B	-rw-r--r--	2024-03-10 20:38
omapfb_dss.h	23.91 KB	-rw-r--r--	2024-03-10 20:38
omapvrfb.h	1.79 KB	-rw-r--r--	2024-03-10 20:38
permedia2.h	8.96 KB	-rw-r--r--	2024-03-10 20:38
platform_lcd.h	440 B	-rw-r--r--	2024-03-10 20:38
pm3fb.h	45.31 KB	-rw-r--r--	2024-03-10 20:38
pmag-ba-fb.h	1.02 KB	-rw-r--r--	2024-03-10 20:38
pmagb-b-fb.h	2.34 KB	-rw-r--r--	2024-03-10 20:38
pxa168fb.h	2.53 KB	-rw-r--r--	2024-03-10 20:38
radeon.h	109.22 KB	-rw-r--r--	2024-03-10 20:38
s1d13xxxfb.h	9.95 KB	-rw-r--r--	2024-03-10 20:38
sa1100fb.h	1.26 KB	-rw-r--r--	2024-03-10 20:38
samsung_fimd.h	17.15 KB	-rw-r--r--	2024-03-10 20:38
sh_mobile_lcdc.h	5.99 KB	-rw-r--r--	2024-03-10 20:38
sisfb.h	606 B	-rw-r--r--	2024-03-10 20:38
sstfb.h	11.07 KB	-rw-r--r--	2024-03-10 20:38
sticore.h	11.62 KB	-rw-r--r--	2024-03-10 20:38
tdfx.h	5.32 KB	-rw-r--r--	2024-03-10 20:38
tgafb.h	6.94 KB	-rw-r--r--	2024-03-10 20:38
trident.h	3.23 KB	-rw-r--r--	2024-03-10 20:38
udlfb.h	2.91 KB	-rw-r--r--	2024-03-10 20:38
uvesafb.h	2.8 KB	-rw-r--r--	2024-03-10 20:38
vga.h	13.84 KB	-rw-r--r--	2024-03-10 20:38
videomode.h	1.35 KB	-rw-r--r--	2024-03-10 20:38

Rename

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *  Copyright (C) 2009 Marvell International Ltd.
 */

#ifndef __ASM_MACH_PXA168FB_H
#define __ASM_MACH_PXA168FB_H

#include <linux/fb.h>
#include <linux/interrupt.h>

/* Dumb interface */
#define PIN_MODE_DUMB_24		0
#define PIN_MODE_DUMB_18_SPI		1
#define PIN_MODE_DUMB_18_GPIO		2
#define PIN_MODE_DUMB_16_SPI		3
#define PIN_MODE_DUMB_16_GPIO		4
#define PIN_MODE_DUMB_12_SPI_GPIO	5
#define PIN_MODE_SMART_18_SPI		6
#define PIN_MODE_SMART_16_SPI		7
#define PIN_MODE_SMART_8_SPI_GPIO	8

/* Dumb interface pin allocation */
#define DUMB_MODE_RGB565		0
#define DUMB_MODE_RGB565_UPPER		1
#define DUMB_MODE_RGB666		2
#define DUMB_MODE_RGB666_UPPER		3
#define DUMB_MODE_RGB444		4
#define DUMB_MODE_RGB444_UPPER		5
#define DUMB_MODE_RGB888		6

/* default fb buffer size WVGA-32bits */
#define DEFAULT_FB_SIZE	(800 * 480 * 4)

/*
 * Buffer pixel format
 * bit0 is for rb swap.
 * bit12 is for Y UorV swap
 */
#define PIX_FMT_RGB565		0
#define PIX_FMT_BGR565		1
#define PIX_FMT_RGB1555		2
#define PIX_FMT_BGR1555		3
#define PIX_FMT_RGB888PACK	4
#define PIX_FMT_BGR888PACK	5
#define PIX_FMT_RGB888UNPACK	6
#define PIX_FMT_BGR888UNPACK	7
#define PIX_FMT_RGBA888		8
#define PIX_FMT_BGRA888		9
#define PIX_FMT_YUV422PACK	10
#define PIX_FMT_YVU422PACK	11
#define PIX_FMT_YUV422PLANAR	12
#define PIX_FMT_YVU422PLANAR	13
#define PIX_FMT_YUV420PLANAR	14
#define PIX_FMT_YVU420PLANAR	15
#define PIX_FMT_PSEUDOCOLOR	20
#define PIX_FMT_UYVY422PACK	(0x1000|PIX_FMT_YUV422PACK)

/*
 * PXA LCD controller private state.
 */
struct pxa168fb_info {
	struct device		*dev;
	struct clk		*clk;
	struct fb_info		*info;

void __iomem		*reg_base;
	dma_addr_t		fb_start_dma;
	u32			pseudo_palette[16];

int			pix_fmt;
	unsigned		is_blanked:1;
	unsigned		panel_rbswap:1;
	unsigned		active:1;
};

/*
 * PXA fb machine information
 */
struct pxa168fb_mach_info {
	char	id[16];

int		num_modes;
	struct fb_videomode *modes;

/*
	 * Pix_fmt
	 */
	unsigned	pix_fmt;

/*
	 * I/O pin allocation.
	 */
	unsigned	io_pin_allocation_mode:4;

/*
	 * Dumb panel -- assignment of R/G/B component info to the 24
	 * available external data lanes.
	 */
	unsigned	dumb_mode:4;
	unsigned	panel_rgb_reverse_lanes:1;

/*
	 * Dumb panel -- GPIO output data.
	 */
	unsigned	gpio_output_mask:8;
	unsigned	gpio_output_data:8;

/*
	 * Dumb panel -- configurable output signal polarity.
	 */
	unsigned	invert_composite_blank:1;
	unsigned	invert_pix_val_ena:1;
	unsigned	invert_pixclock:1;
	unsigned	panel_rbswap:1;
	unsigned	active:1;
	unsigned	enable_lcd:1;
};

#endif /* __ASM_MACH_PXA168FB_H */