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Name	Size	Permission	Date
bridge	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
display	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
i2c	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
ttm	[ DIR ]	drwxr-xr-x	2026-07-17 06:29
amd_asic_type.h	2.33 KB	-rw-r--r--	2024-03-10 20:38
drm_accel.h	2.25 KB	-rw-r--r--	2026-07-01 19:48
drm_aperture.h	1.06 KB	-rw-r--r--	2024-03-10 20:38
drm_atomic.h	42.54 KB	-rw-r--r--	2026-07-01 19:48
drm_atomic_helper.h	10.78 KB	-rw-r--r--	2024-03-10 20:38
drm_atomic_state_helper.h	4.42 KB	-rw-r--r--	2024-03-10 20:38
drm_atomic_uapi.h	2.06 KB	-rw-r--r--	2024-03-10 20:38
drm_audio_component.h	3.84 KB	-rw-r--r--	2024-03-10 20:38
drm_auth.h	4.18 KB	-rw-r--r--	2024-03-10 20:38
drm_blend.h	2.35 KB	-rw-r--r--	2024-03-10 20:38
drm_bridge.h	34.88 KB	-rw-r--r--	2026-07-01 19:48
drm_bridge_connector.h	405 B	-rw-r--r--	2024-03-10 20:38
drm_buddy.h	4.17 KB	-rw-r--r--	2024-03-10 20:38
drm_cache.h	3.3 KB	-rw-r--r--	2024-03-10 20:38
drm_client.h	5.04 KB	-rw-r--r--	2024-03-10 20:38
drm_color_mgmt.h	3.91 KB	-rw-r--r--	2024-03-10 20:38
drm_connector.h	65.08 KB	-rw-r--r--	2026-07-01 19:48
drm_crtc.h	44.52 KB	-rw-r--r--	2024-03-10 20:38
drm_crtc_helper.h	2.51 KB	-rw-r--r--	2024-03-10 20:38
drm_damage_helper.h	3.33 KB	-rw-r--r--	2024-03-10 20:38
drm_debugfs.h	5.68 KB	-rw-r--r--	2024-03-10 20:38
drm_debugfs_crc.h	2.66 KB	-rw-r--r--	2024-03-10 20:38
drm_device.h	7.64 KB	-rw-r--r--	2026-07-01 19:48
drm_displayid.h	4.99 KB	-rw-r--r--	2026-07-01 19:48
drm_drv.h	17.81 KB	-rw-r--r--	2024-03-10 20:38
drm_edid.h	15.68 KB	-rw-r--r--	2026-07-01 19:48
drm_eld.h	4.76 KB	-rw-r--r--	2024-03-10 20:38
drm_encoder.h	11.07 KB	-rw-r--r--	2024-03-10 20:38
drm_encoder_slave.h	6.46 KB	-rw-r--r--	2024-03-10 20:38
drm_exec.h	4.29 KB	-rw-r--r--	2024-03-10 20:38
drm_fb_dma_helper.h	575 B	-rw-r--r--	2024-03-10 20:38
drm_fb_helper.h	11.75 KB	-rw-r--r--	2024-03-10 20:38
drm_fbdev_dma.h	656 B	-rw-r--r--	2026-07-01 19:48
drm_fbdev_generic.h	349 B	-rw-r--r--	2024-03-10 20:38
drm_file.h	14.24 KB	-rw-r--r--	2026-07-01 19:48
drm_fixed.h	4.83 KB	-rw-r--r--	2026-07-01 19:48
drm_flip_work.h	2.63 KB	-rw-r--r--	2024-03-10 20:38
drm_format_helper.h	5.33 KB	-rw-r--r--	2024-03-10 20:38
drm_fourcc.h	9.91 KB	-rw-r--r--	2024-03-10 20:38
drm_framebuffer.h	10.04 KB	-rw-r--r--	2026-07-01 19:48
drm_gem.h	18.6 KB	-rw-r--r--	2026-07-01 19:48
drm_gem_atomic_helper.h	5.52 KB	-rw-r--r--	2024-03-10 20:38
drm_gem_dma_helper.h	9.26 KB	-rw-r--r--	2024-03-10 20:38
drm_gem_framebuffer_helper.h	1.93 KB	-rw-r--r--	2024-03-10 20:38
drm_gem_shmem_helper.h	7.93 KB	-rw-r--r--	2024-03-10 20:38
drm_gem_ttm_helper.h	822 B	-rw-r--r--	2024-03-10 20:38
drm_gem_vram_helper.h	6.08 KB	-rw-r--r--	2024-03-10 20:38
drm_gpuvm.h	33.54 KB	-rw-r--r--	2024-03-10 20:38
drm_ioctl.h	5.82 KB	-rw-r--r--	2024-03-10 20:38
drm_kunit_helpers.h	4.21 KB	-rw-r--r--	2026-07-01 19:48
drm_lease.h	1010 B	-rw-r--r--	2024-03-10 20:38
drm_managed.h	3.9 KB	-rw-r--r--	2024-03-10 20:38
drm_mipi_dbi.h	6.87 KB	-rw-r--r--	2024-03-10 20:38
drm_mipi_dsi.h	13.22 KB	-rw-r--r--	2026-07-01 19:48
drm_mm.h	17.53 KB	-rw-r--r--	2024-03-10 20:38
drm_mode_config.h	32.81 KB	-rw-r--r--	2024-03-10 20:38
drm_mode_object.h	5.46 KB	-rw-r--r--	2024-03-10 20:38
drm_modes.h	19.9 KB	-rw-r--r--	2024-03-10 20:38
drm_modeset_helper.h	1.77 KB	-rw-r--r--	2024-03-10 20:38
drm_modeset_helper_vtables.h	59.37 KB	-rw-r--r--	2026-07-01 19:48
drm_modeset_lock.h	7.07 KB	-rw-r--r--	2024-03-10 20:38
drm_module.h	3.72 KB	-rw-r--r--	2024-03-10 20:38
drm_of.h	5.27 KB	-rw-r--r--	2026-07-01 19:48
drm_panel.h	8.89 KB	-rw-r--r--	2024-03-10 20:38
drm_pciids.h	61.04 KB	-rw-r--r--	2024-03-10 20:38
drm_plane.h	30.92 KB	-rw-r--r--	2024-03-10 20:38
drm_plane_helper.h	2.22 KB	-rw-r--r--	2024-03-10 20:38
drm_prime.h	4.06 KB	-rw-r--r--	2024-03-10 20:38
drm_print.h	20.39 KB	-rw-r--r--	2026-07-01 19:48
drm_privacy_screen_consumer.h	1.94 KB	-rw-r--r--	2024-03-10 20:38
drm_privacy_screen_driver.h	2.99 KB	-rw-r--r--	2024-03-10 20:38
drm_privacy_screen_machine.h	1.25 KB	-rw-r--r--	2024-03-10 20:38
drm_probe_helper.h	1.57 KB	-rw-r--r--	2024-03-10 20:38
drm_property.h	11.99 KB	-rw-r--r--	2024-03-10 20:38
drm_rect.h	7.17 KB	-rw-r--r--	2024-03-10 20:38
drm_self_refresh_helper.h	594 B	-rw-r--r--	2024-03-10 20:38
drm_simple_kms_helper.h	9.52 KB	-rw-r--r--	2024-03-10 20:38
drm_suballoc.h	2.75 KB	-rw-r--r--	2024-03-10 20:38
drm_syncobj.h	3.95 KB	-rw-r--r--	2024-03-10 20:38
drm_sysfs.h	512 B	-rw-r--r--	2024-03-10 20:38
drm_util.h	2.58 KB	-rw-r--r--	2024-03-10 20:38
drm_utils.h	592 B	-rw-r--r--	2026-07-01 19:48
drm_vblank.h	10.18 KB	-rw-r--r--	2026-07-01 19:48
drm_vblank_work.h	1.91 KB	-rw-r--r--	2024-03-10 20:38
drm_vma_manager.h	8.23 KB	-rw-r--r--	2024-03-10 20:38
drm_writeback.h	4.45 KB	-rw-r--r--	2024-03-10 20:38
gma_drm.h	413 B	-rw-r--r--	2024-03-10 20:38
gpu_scheduler.h	20.85 KB	-rw-r--r--	2026-07-01 19:48
gud.h	11.65 KB	-rw-r--r--	2024-03-10 20:38
i915_component.h	1.81 KB	-rw-r--r--	2024-03-10 20:38
i915_drm.h	3.57 KB	-rw-r--r--	2024-03-10 20:38
i915_gsc_proxy_mei_interface.h	1.52 KB	-rw-r--r--	2024-03-10 20:38
i915_hdcp_interface.h	16.22 KB	-rw-r--r--	2024-03-10 20:38
i915_pciids.h	23.94 KB	-rw-r--r--	2026-07-01 19:48
i915_pxp_tee_interface.h	1.28 KB	-rw-r--r--	2024-03-10 20:38
intel-gtt.h	1015 B	-rw-r--r--	2024-03-10 20:38
intel_lpe_audio.h	1.72 KB	-rw-r--r--	2024-03-10 20:38
spsc_queue.h	3.08 KB	-rw-r--r--	2026-07-01 19:48
task_barrier.h	2.95 KB	-rw-r--r--	2024-03-10 20:38
xe_pciids.h	5.37 KB	-rw-r--r--	2024-03-10 20:38

Rename

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2022 Intel Corporation
 */

#ifndef _XE_PCIIDS_H_
#define _XE_PCIIDS_H_

/*
 * Lists below can be turned into initializers for a struct pci_device_id
 * by defining INTEL_VGA_DEVICE:
 *
 * #define INTEL_VGA_DEVICE(id, info) { \
 *	0x8086, id,			\
 *	~0, ~0,				\
 *	0x030000, 0xff0000,		\
 *	(unsigned long) info }
 *
 * And then calling like:
 *
 * XE_TGL_12_GT1_IDS(INTEL_VGA_DEVICE, ## __VA_ARGS__)
 *
 * To turn them into something else, just provide a different macro passed as
 * first argument.
 */

/* TGL */
#define XE_TGL_GT1_IDS(MACRO__, ...)		\
	MACRO__(0x9A60, ## __VA_ARGS__),	\
	MACRO__(0x9A68, ## __VA_ARGS__),	\
	MACRO__(0x9A70, ## __VA_ARGS__)

#define XE_TGL_GT2_IDS(MACRO__, ...)		\
	MACRO__(0x9A40, ## __VA_ARGS__),	\
	MACRO__(0x9A49, ## __VA_ARGS__),	\
	MACRO__(0x9A59, ## __VA_ARGS__),	\
	MACRO__(0x9A78, ## __VA_ARGS__),	\
	MACRO__(0x9AC0, ## __VA_ARGS__),	\
	MACRO__(0x9AC9, ## __VA_ARGS__),	\
	MACRO__(0x9AD9, ## __VA_ARGS__),	\
	MACRO__(0x9AF8, ## __VA_ARGS__)

#define XE_TGL_IDS(MACRO__, ...)		\
	XE_TGL_GT1_IDS(MACRO__, ## __VA_ARGS__),\
	XE_TGL_GT2_IDS(MACRO__, ## __VA_ARGS__)

/* RKL */
#define XE_RKL_IDS(MACRO__, ...)		\
	MACRO__(0x4C80, ## __VA_ARGS__),	\
	MACRO__(0x4C8A, ## __VA_ARGS__),	\
	MACRO__(0x4C8B, ## __VA_ARGS__),	\
	MACRO__(0x4C8C, ## __VA_ARGS__),	\
	MACRO__(0x4C90, ## __VA_ARGS__),	\
	MACRO__(0x4C9A, ## __VA_ARGS__)

/* DG1 */
#define XE_DG1_IDS(MACRO__, ...)		\
	MACRO__(0x4905, ## __VA_ARGS__),	\
	MACRO__(0x4906, ## __VA_ARGS__),	\
	MACRO__(0x4907, ## __VA_ARGS__),	\
	MACRO__(0x4908, ## __VA_ARGS__),	\
	MACRO__(0x4909, ## __VA_ARGS__)

/* ADL-S */
#define XE_ADLS_IDS(MACRO__, ...)		\
	MACRO__(0x4680, ## __VA_ARGS__),	\
	MACRO__(0x4682, ## __VA_ARGS__),	\
	MACRO__(0x4688, ## __VA_ARGS__),	\
	MACRO__(0x468A, ## __VA_ARGS__),	\
	MACRO__(0x468B, ## __VA_ARGS__),	\
	MACRO__(0x4690, ## __VA_ARGS__),	\
	MACRO__(0x4692, ## __VA_ARGS__),	\
	MACRO__(0x4693, ## __VA_ARGS__)

/* ADL-P */
#define XE_ADLP_IDS(MACRO__, ...)		\
	MACRO__(0x46A0, ## __VA_ARGS__),	\
	MACRO__(0x46A1, ## __VA_ARGS__),	\
	MACRO__(0x46A2, ## __VA_ARGS__),	\
	MACRO__(0x46A3, ## __VA_ARGS__),	\
	MACRO__(0x46A6, ## __VA_ARGS__),	\
	MACRO__(0x46A8, ## __VA_ARGS__),	\
	MACRO__(0x46AA, ## __VA_ARGS__),	\
	MACRO__(0x462A, ## __VA_ARGS__),	\
	MACRO__(0x4626, ## __VA_ARGS__),	\
	MACRO__(0x4628, ## __VA_ARGS__),	\
	MACRO__(0x46B0, ## __VA_ARGS__),	\
	MACRO__(0x46B1, ## __VA_ARGS__),	\
	MACRO__(0x46B2, ## __VA_ARGS__),	\
	MACRO__(0x46B3, ## __VA_ARGS__),	\
	MACRO__(0x46C0, ## __VA_ARGS__),	\
	MACRO__(0x46C1, ## __VA_ARGS__),	\
	MACRO__(0x46C2, ## __VA_ARGS__),	\
	MACRO__(0x46C3, ## __VA_ARGS__)

/* ADL-N */
#define XE_ADLN_IDS(MACRO__, ...)		\
	MACRO__(0x46D0, ## __VA_ARGS__),	\
	MACRO__(0x46D1, ## __VA_ARGS__),	\
	MACRO__(0x46D2, ## __VA_ARGS__)

/* RPL-S */
#define XE_RPLS_IDS(MACRO__, ...)		\
	MACRO__(0xA780, ## __VA_ARGS__),	\
	MACRO__(0xA781, ## __VA_ARGS__),	\
	MACRO__(0xA782, ## __VA_ARGS__),	\
	MACRO__(0xA783, ## __VA_ARGS__),	\
	MACRO__(0xA788, ## __VA_ARGS__),	\
	MACRO__(0xA789, ## __VA_ARGS__),	\
	MACRO__(0xA78A, ## __VA_ARGS__),	\
	MACRO__(0xA78B, ## __VA_ARGS__)

/* RPL-U */
#define XE_RPLU_IDS(MACRO__, ...)		\
	MACRO__(0xA721, ## __VA_ARGS__),	\
	MACRO__(0xA7A1, ## __VA_ARGS__),	\
	MACRO__(0xA7A9, ## __VA_ARGS__),	\
	MACRO__(0xA7AC, ## __VA_ARGS__),	\
	MACRO__(0xA7AD, ## __VA_ARGS__)

/* RPL-P */
#define XE_RPLP_IDS(MACRO__, ...)		\
	XE_RPLU_IDS(MACRO__, ## __VA_ARGS__),	\
	MACRO__(0xA720, ## __VA_ARGS__),	\
	MACRO__(0xA7A0, ## __VA_ARGS__),	\
	MACRO__(0xA7A8, ## __VA_ARGS__),	\
	MACRO__(0xA7AA, ## __VA_ARGS__),	\
	MACRO__(0xA7AB, ## __VA_ARGS__)

/* DG2 */
#define XE_DG2_G10_IDS(MACRO__, ...)		\
	MACRO__(0x5690, ## __VA_ARGS__),	\
	MACRO__(0x5691, ## __VA_ARGS__),	\
	MACRO__(0x5692, ## __VA_ARGS__),	\
	MACRO__(0x56A0, ## __VA_ARGS__),	\
	MACRO__(0x56A1, ## __VA_ARGS__),	\
	MACRO__(0x56A2, ## __VA_ARGS__)

#define XE_DG2_G11_IDS(MACRO__, ...)		\
	MACRO__(0x5693, ## __VA_ARGS__),	\
	MACRO__(0x5694, ## __VA_ARGS__),	\
	MACRO__(0x5695, ## __VA_ARGS__),	\
	MACRO__(0x56A5, ## __VA_ARGS__),	\
	MACRO__(0x56A6, ## __VA_ARGS__),	\
	MACRO__(0x56B0, ## __VA_ARGS__),	\
	MACRO__(0x56B1, ## __VA_ARGS__),	\
	MACRO__(0x56BA, ## __VA_ARGS__),	\
	MACRO__(0x56BB, ## __VA_ARGS__),	\
	MACRO__(0x56BC, ## __VA_ARGS__),	\
	MACRO__(0x56BD, ## __VA_ARGS__)

#define XE_DG2_G12_IDS(MACRO__, ...)		\
	MACRO__(0x5696, ## __VA_ARGS__),	\
	MACRO__(0x5697, ## __VA_ARGS__),	\
	MACRO__(0x56A3, ## __VA_ARGS__),	\
	MACRO__(0x56A4, ## __VA_ARGS__),	\
	MACRO__(0x56B2, ## __VA_ARGS__),	\
	MACRO__(0x56B3, ## __VA_ARGS__)

#define XE_DG2_IDS(MACRO__, ...)		\
	XE_DG2_G10_IDS(MACRO__, ## __VA_ARGS__),\
	XE_DG2_G11_IDS(MACRO__, ## __VA_ARGS__),\
	XE_DG2_G12_IDS(MACRO__, ## __VA_ARGS__)

#define XE_ATS_M150_IDS(MACRO__, ...)		\
	MACRO__(0x56C0, ## __VA_ARGS__),	\
	MACRO__(0x56C2, ## __VA_ARGS__)

#define XE_ATS_M75_IDS(MACRO__, ...)		\
	MACRO__(0x56C1, ## __VA_ARGS__)

#define XE_ATS_M_IDS(MACRO__, ...)		\
	XE_ATS_M150_IDS(MACRO__, ## __VA_ARGS__),\
	XE_ATS_M75_IDS(MACRO__, ## __VA_ARGS__)

/* MTL / ARL */
#define XE_MTL_IDS(MACRO__, ...)		\
	MACRO__(0x7D40, ## __VA_ARGS__),	\
	MACRO__(0x7D45, ## __VA_ARGS__),	\
	MACRO__(0x7D55, ## __VA_ARGS__),	\
	MACRO__(0x7D60, ## __VA_ARGS__),	\
	MACRO__(0x7D67, ## __VA_ARGS__),	\
	MACRO__(0x7DD5, ## __VA_ARGS__)

#define XE_LNL_IDS(MACRO__, ...) \
	MACRO__(0x6420, ## __VA_ARGS__), \
	MACRO__(0x64A0, ## __VA_ARGS__), \
	MACRO__(0x64B0, ## __VA_ARGS__)

#endif